MCF5481 FREESCALE [Freescale Semiconductor, Inc], MCF5481 Datasheet - Page 10

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MCF5481

Manufacturer Part Number
MCF5481
Description
Microprocessor Electrical Characteristics
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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FlexBus
10
NOTES:
1
2
3
4
5
Num
FB6
FB7
FB8
FB9
The frequency of operation is the same as the PCI frequency of operation. The MCF548X supports a single
external reference clock (CLKIN). This signal defines the frequency of operation for both FlexBus and PCI.
Max cycle rate is determined by CLKIN and how the user has the system PLL configured.
Timing for chip selects only applies to the FBCS[5:0] signals. Please see
Timing
The FlexBus supports programming an extension of the address hold. Please consult the MCF548X
specification manual for more information.
These specs are used when the PCIAD[31:0] signals are configured as 32-bit, non-muxed FlexBus address
signals.
FBCSn, BE/BWEn
Transfer Acknowledge (TA) Input Setup
Transfer Acknowledge (TA) Input Hold
Address Output Valid (PCIAD[31:0])
Address Output Hold (PCIAD[31:0])
Characteristics” for SDCS[3:0] timing.
TSIZ[1:0]
AD[31:Y]
AD[X:0]
CLKIN
MCF548x Integrated Microprocessor Electrical Characteristics, Rev. 2.1
R/W
ALE
OE
TA
Table 10. FlexBus AC Timing Specifications (continued)
Characteristic
FB1
Figure 7. FlexBus Read Timing
A[31:Y]
FB2
FB6
DATA
TSIZ[1:0]
A[X:0]
FB4
FB7
FB5
Min
Section 9.2, “DDR SDRAM AC
4
0
0
Max
7.0
FB3
Freescale Semiconductor
Unit
ns
ns
ns
ns
Notes
5
5

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