MCF5481 FREESCALE [Freescale Semiconductor, Inc], MCF5481 Datasheet - Page 14

• Manufacturer Part Number: MCF5481
• Description: Microprocessor Electrical Characteristics
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

SDRAM Bus
9.2
When using the DDR SDRAM controller, the following timing numbers must be followed to properly
latch or drive data onto the memory bus. All timing numbers are relative to the four DQS byte lanes.
Table
14
SDCSn,SDWE,
NOTES:
1
12shows the DDR clock crossover specifications.
V
V
V
V
Symbol
RAS, CAS
SDBA[1:0]
MP
OUT
ID
IX
SDADDR,
Memories
The clock crossover voltage is only guaranteed when using the highest drive strength option for the
SDCLK[1:0] and SDCLK[1:0] signals.
SDDATA
SDCLK0
SDCLK1
Delayed
SDRQS
SDDQS
SDCLK
DDR SDRAM AC Timing Characteristics
SDDM
form
Clock output mid-point voltage
Clock output voltage level
Clock output differential voltage (peak to peak swing)
Clock crossing point voltage
(Measured at Output Pin)
(Measured at Input Pin)
NOTE: Data driven from memories relative
SD5
MCF548x Integrated Microprocessor Electrical Characteristics, Rev. 2.1
to delayed memory clock.
SD2
SD2
ROW
CMD
Table 12. DDR Clock Crossover Specifications
SD1
Characteristic
SD6
1
Figure 10. SDR Read Timing
COL
Board Delay
Board Delay
tDQS
SD11
WD1
3/4 MCLK
Reference
1.05
–0.3
1.05
Min
0.7
SD10
SD7
WD2
SD_VDD + 0.3
SD_VDD + 0.6
SD8
SD9
Max
1.45
1.45
WD3
Freescale Semiconductor
WD4
Unit
V
V
V
V