X4645 INTERSIL [Intersil Corporation], X4645 Datasheet - Page 5

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X4645

Manufacturer Part Number
X4645
Description
CPU Supervidor with 64K EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Figure 4. V
Control Register
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is removed.
The Control Register is accessed at address FFFFh. It
can only be modified by performing a byte write opera-
tion directly to the address of the register and only one
data byte is allowed for each register write operation.
TRIP
Emax = Maximum Allowed V
Programming Sequence
Old V
New V
CC
CC
Applied + Error
Applied =
5
Error ≤ –Emax
TRIP
Error
NO
Set V
X4643, X4645
V
(V
TRIP
Apply 5V to V
Measured V
Decrement V
CC
CC
Desired V
goes active?
Desired V
Reset V
RESET pin
Sequence
Sequence
Set V
= V
Execute
Execute
= V
Programming
DONE
CC
CC
TRIP
YES
–Emax < Error < Emax
TRIP
- 50mV)
Applied =
TRIP
TRIP
TRIP
Prior to writing to the Control Register, the WEL and
RWEL bits must be set using a two step process, with
the whole sequence requiring 3 steps. See "Writing to
the Control Register" below.
The user must issue a stop after sending this byte to the
register to initiate the nonvolatile cycle that stores WD1,
and WD0. The X4643/5 will not acknowledge any data
bytes written after the first byte is entered.
CC
CC
-
Error ≥ Emax
Old V
New V
CC
Reset V
Sequence
CC
Execute
Applied - Error
Applied =
TRIP
March 29, 2005
FN8123.0

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