M38062M3-156FP MITSUBISHI [Mitsubishi Electric Semiconductor], M38062M3-156FP Datasheet - Page 40

• Manufacturer Part Number: M38062M3-156FP
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Note1:
SWITCHING CHARACTERISTICS 2 IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
TIMING REQUIREMENTS 2 IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
40
t
t
t
t
t
t
th
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su(ONW– )
h( –ONW)
su(DB– )
h( –DB)
su(ONW–RD)
su(ONW–WR)
h(WR–ONW)
su(DB–RD)
h(RD–DB)
c( )
wH( )
wL( )
d( –AH)
v( –AH)
d( –AL)
v( –AL)
d( –SYNC)
v( –SYNC)
d( –WR)
v( –WR)
d( –DB)
v( –DB)
wL(RD)
wL(WR)
d(AH–RD)
d(AH–WR)
d(AL–RD)
d(AL–WR)
v(RD–AH)
v(WR–AH)
v(RD–AL)
v(WR–AL)
d(WR–DB)
v(WR–DB)
d(RESET–RESET
v( –RESET)
___ _____
(RD–ONW)
___
___
___
___ ____
___
__
__
__
__ ____
____ __
____ ___
____
___
__
___
____
___
_____
Symbol
Symbol
___
___
__
__
The RESET
the RESET input goes “H”.
__
OUT
______
__________
)
OUT
___
___
___
___
After
After
After
After
SYNC delay time
SYNC valid time
RD and WR delay time
RD and WR valid time
After
After
RD pulse width, WR pulse width
RD pulse width, WR pulse width
(when one-wait is valid)
After AD
After AD
After AD
After AD
After RD AD
After WR AD
After RD AD
After WR AD
After WR data bus delay time
After WR data bus valid time
_________
RESET
_________
RESET
Before
After
Before
After
Before RD ONW input set up time
Before WR ONW input set up time
After RD ONW input hold time
After WR ONW input hold time
Before RD data bus set up time
After RD data bus hold time
clock cycle time
clock “H” pulse width
clock “L” pulse width
output goes “H” in sync with the fall of the
___
___
___
___
___
___
___ _____
___
___ _____
AD
AD
AD
AD
data bus delay time
data bus valid time
_____
OUT
OUT
ONW input hold time
data bus hold time
___ _____
___ _____
___
___
___
15
15
7
7
_____
ONW input set up time
data bus set up time
–AD
–AD
15
15
7
7
–AD
–AD
–AD
–AD
output delay time (Note 1)
output valid time (Note 1)
–AD
–AD
15
7
15
7
–AD
Parameter
0
0
–AD
–AD
8
8
–AD
___
RD delay time
___
WR delay time
0
0
___
___
___
RD delay time
___
WR delay time
8
8
delay time
valid time
0
0
delay time
valid time
8
8
valid time
valid time
valid time
valid time
Parameter
clock that is anywhere between about 8 cycle and 13 cycles after
(V
(V
Test conditions
CC
CC
= 3.0 V, V
= 3.0 V, V
Fig. 32
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SS =
SS =
0 V, T
0 V, T
MITSUBISHI MICROCOMPUTERS
a
a
= –20 to 85 C, unless otherwise noted)
= –20 to 85 C, unless otherwise noted)
3t
t
t
t
t
t
c(X
c(X
c(X
c(X
c(X
c(X
IN
IN
Min.
IN
IN
10
10
15
IN
10
IN
)
)
3
5
5
0
)
)
)
–145
–145
–20
–20
–20
)
Min.
–20
–20
–20
180
–20
–20
185
0
0
3806 Group
Limits
Limits
2t
Typ.
Typ.
c(X
15
15
40
20
15
10
10
7
IN
)
Max.
Max.
150
150
200
195
300
300
25
15
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns