M38062M3-156FP MITSUBISHI [Mitsubishi Electric Semiconductor], M38062M3-156FP Datasheet - Page 52

• Manufacturer Part Number: M38062M3-156FP
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

TIMING REQUIREMENTS 2 IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
(High-speed version)
SWITCHING CHARACTERISTICS 2 IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
(High-Speed Version)
Note 1:
52
Fig. 32
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su(ONW– )
h( –ONW)
su(DB– )
h( –DB)
su(ONW–RD)
su(ONW–WR)
h(RD–ONW)
h(WR–ONW)
su(DB–RD)
h(RD–DB)
c( )
wH( )
wL( )
d( –AH)
v( –AH)
d( –AL)
v( –AL)
d( –SYNC)
v( –SYNC)
d( –DB)
v( –DB)
wL(RD)
wL(WR)
d(AH–RD)
d(AH–WR)
d(AL–RD)
d(AL–WR)
v(RD–AH)
v(WR–AH)
v(RD–AL)
v(WR–AL)
d(WR–DB)
v(WR–DB)
d(RESET–RESET
v( –RESET)
Symbol
___ ____
Symbol
___ _____
__ ____
__
___
___
___
___
__
__
____ __
____ ___
____
___
__
____
Measurement output pin
_____
___
___
__
__
__
The RESET
the RESET input goes “H”.
Circuit for measuring output switching
characteristics (1)
OUT
______
)
_________
Before
After
Before
After
Before RD ONW input set up time
Before WR ONW input set up time
After RD ONW input hold time
After WR ONW input hold time
Before RD data bus set up time
After RD data bus hold time
AD
AD
AD
AD
SYNC delay time
SYNC valid time
Data bus delay time
Data bus valid time
___
RD pulse width, WR pulse width
___
RD pulse width, WR pulse width
(when one-wait is valid)
After AD
After AD
After AD
After AD
After RD AD
After WR AD
After RD AD
After WR AD
After WR data bus delay time
After WR data bus valid time
RESET
RESET
_________
_________
clock cycle time
clock “H” pulse width
clock “L” pulse width
15
15
7
7
–AD
–AD
___ _____
___ _____
___
–AD
–AD
___
___
___
___
___
___
OUT
_____
ONW input hold time
data bus hold time
___ _____
___ _____
___
OUT
OUT
0
0
15
15
7
7
_____
ONW input set up time
data bus set up time
8
8
–AD
–AD
delay time
valid time
output goes “H” in sync with the rise of the
–AD
–AD
delay time
valid time
output delay time (Note 1)
output valid time (Note 1)
15
7
15
7
–AD
–AD
0
0
–AD
–AD
8
8
___
___
WR delay time
RD delay time
___
___
___
___
WR delay time
RD delay time
0
Parameter
0
8
8
valid time
valid time
valid time
CMOS output
valid time
100pF
Parameter
(V
(V
clock that is anywhere between about 8 cycle and 13 cycles after
Fig. 33
CC
CC
Test conditions
= 2.7 V, V
Measurement output pin
= 2.7 V, V
Fig. 32
Circuit for measuring output switching
characteristics (2)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SS =
SS =
0 V, T
0 V, T
MITSUBISHI MICROCOMPUTERS
a
a
= –20 to 85 C, unless otherwise noted)
= –20 to 85 C, unless otherwise noted)
N-channel open-drain output
t
3t
t
t
t
c(X
t
c(X
c(X
c(X
c(X
c(X
Min.
IN
IN
IN
IN
10
10
IN
Min.
)
–20
–20
120
–20
–20
120
IN
)
5
5
5
5
0
)
–100
–100
)
)
–20
–20
–20
)
–20
0
0
Limits
t
t
3806 Group
Limits
2t
c(X
c(X
Typ.
Typ.
60
60
c(X
40
10
50
10
40
10
30
10
10
30
100pF
IN
IN
1k
)
)
–40
–50
IN
)
Max.
Max.
100
100
300
150
80
80
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns