M38062M3-156FP MITSUBISHI [Mitsubishi Electric Semiconductor], M38062M3-156FP Datasheet - Page 45

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M38062M3-156FP

Manufacturer Part Number
M38062M3-156FP
Description
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Note 1:
(Extended operating temperature version)
TIMING REQUIREMENTS IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
(Extended operating temperature version)
SWITCHING CHARACTERISTICS IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su(ONW– )
h( –ONW)
su(DB– )
h( –DB)
su(ONW–RD)
su(ONW–WR)
h(RD–ONW)
h(WR–ONW)
su(DB–RD)
h(RD–DB)
d(RESET–RESET
c( )
wH( )
wL( )
d( –AH)
v( –AH)
d( –AL)
v( –AL)
d( –SYNC)
v( –SYNC)
d( –WR)
v( –WR)
d( –DB)
v( –DB)
wL(RD)
wL(WR)
d(AH–RD)
d(AH–WR)
d(AL–RD)
d(AL–WR)
v(RD–AH)
v(WR–AH)
v(RD–AL)
v(WR–AL)
d(WR–DB)
v(WR–DB)
v( –RESET)
Symbol
Symbol
___ ____
___ _____
__ ____
__
___
___
___
___
__
__
____ __
____ ___
____
__
____
___
__
___
_____
___
___
__
__
__
The RESET
the RESET input goes “H”.
OUT
______
)
_________
Before
After
Before
After
Before RD ONW input set up time
Before WR ONW input set up time
After RD ONW input hold time
After WR ONW input hold time
Before RD data bus set up time
After RD data bus hold time
After
After
After
After
SYNC delay time
SYNC valid time
___
RD and WR delay time
___
RD and WR valid time
After
After
___
RD pulse width, WR pulse width
___
RD pulse width, WR pulse width
(When one-wait is valid)
After AD
After AD
After AD
After AD
After RD AD
After WR AD
After RD AD
After WR AD
After WR data bus delay time
After WR data bus valid time
RESET
RESET
_________
_________
clock cycle time
clock “H” pulse width
clock “L” pulse width
___ _____
___
___ _____
___
___
___
___
___
___
OUT
_____
ONW input hold time
data bus hold time
___ _____
___ _____
___
AD
AD
AD
AD
data bus delay time
data bus valid time
OUT
OUT
___
___
15
15
7
7
_____
ONW input set up time
data bus set up time
–AD
–AD
output goes “H” in sync with the fall of the
15
15
7
7
–AD
–AD
–AD
–AD
output delay time (Note 1)
output valid time (Note 1)
–AD
–AD
15
7
15
7
–AD
–AD
0
0
–AD
8
8
–AD
___
___
WR delay time
0
RD delay time
0
___
___
___
WR delay time
RD delay time
___
8
8
delay time
valid time
0
Parameter
0
delay time
valid time
8
8
valid time
valid time
valid time
valid time
Parameter
(V
(V
CC
CC
= 4.0 to 5.5 V, V
= 4.0 to 5.5 V, V
clock that is anywhere between about 8 cycle and 13 cycles after
Test conditions
Fig. 32
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SS =
SS =
0 V, T
0 V, T
MITSUBISHI MICROCOMPUTERS
a
= –40 to 85 C, unless otherwise noted)
a
= –40 to 85 C, unless otherwise noted)
3t
t
t
t
t
t
c(X
c(X
c(X
c(X
c(X
c(X
Min.
15
10
IN
IN
IN
IN
IN
Min.
IN
–20
–20
–20
–20
6
6
3
0
0
0
)
)
)
)
)
–10
–10
–10
–35
–40
)
60
65
–10
0
0
Limits
t
t
3806 Group
Limits
2t
c(X
c(X
Typ.
Typ.
c(X
20
10
25
10
20
10
10
20
15
IN
IN
5
5
5
)
)
–15
–20
IN
)
Max.
Max.
200
200
40
45
20
10
70
65
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
45

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