NS16C2552TVA NSC [National Semiconductor], NS16C2552TVA Datasheet - Page 9

• Manufacturer Part Number: NS16C2552TVA
• Description: Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate
• Manufacturer: NSC [National Semiconductor]

6.0 Register Set
There are two identical register sets, one for each channel,
in the DUART. All register descriptions in this section apply to
the register sets in both channels.
To clarify the descriptions of transmission and receiving op-
erations, the nomenclatures through out this documentation
are as follows:
C
H
N
N
C
H
N
N
A
E
A
E
L
1
L
2
DLAB1
DLAB1
0
0
0
0
x
x
x
x
x
1
1
1
0
0
0
0
x
x
x
x
x
1
1
1
CHSL
CHSL
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
A2
A2
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
TABLE 1. Basic Register Addresses
A1
A1
0
0
1
1
1
0
0
1
1
0
0
1
0
0
1
1
1
0
0
1
1
0
0
1
9
A0
A0
The address and control pins to register selection is summa-
rized in Table 1.
• Frame - Refers to all the bits between Start and Stop.
• Character or word - The payload of a frame, between 5 to
• “!=” - Not equal to.
• Res - Reserved bit.
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
0
1
0
1
0
1
0
1
0
8 bits.
Receive Buffer (Read), Transmitter Holding Register
(Write)
Interrupt Enable
Interrupt Identification (Read)
FIFO Control (Write)
Line Control
Modem Control
Line Status (Read)
Modem Status (Read)
Scratchpad
Divisor Latch (Least Significant Byte)
Divisor Latch (Most Significant Byte)
Alternate Function
Receive Buffer (Read), Transmitter Holding Register
(Write)
Interrupt Enable
Interrupt Identification (Read)
FIFO Control (Write)
Line Control
Modem Control
Line Status (Read)
Modem Status (Read)
Scratchpad
Divisor Latch (Least Significant Byte)
Divisor Latch (Most Significant Byte)
Alternate Function
Register
Register
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