WM8941GEFL WOLFSON [Wolfson Microelectronics plc], WM8941GEFL Datasheet - Page 21
WM8941GEFL
Manufacturer Part Number
WM8941GEFL
Description
Mono CODEC with Speaker Driver and Video Buffer
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8941GEFL.pdf
(96 pages)
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The input PGA is enabled by the IPPGAEN register bit.
Table 3 Input PGA Enable Control
INPUT PGA VOLUME CONTROL
Table 4 Input PGA Volume Control
The input microphone PGA has a gain range from -12dB to +35.25dB in 0.75dB steps. The gain
from the MICN input to the PGA output and from the AUX amplifier to the PGA output are always
common and controlled by the register bits INPPGAVOL[5:0]. These register bits also affect the
MICP pin when MICP2INPPGA=1.
When the Automatic Level Control (ALC) is enabled the input PGA gain is then controlled
automatically and the INPPGAVOL bits should not be used.
R2
Power
Management 2
R45
Input PGA
volume
control
R32
ALC control 1
REGISTER
ADDRESS
REGISTER
ADDRESS
7
6
5:0
8
BIT
2
BIT
INPPGAZC
INPPGAMUTE
INPPGAVOL
ALCSEL
INPPGAEN
LABEL
LABEL
0
1
010000
0
DEFAULT
0
DEFAULT
Input PGA zero cross enable:
0=Update gain when gain register changes
1=Update gain on 1
register write.
Mute control for input PGA:
0=Input PGA not muted, normal operation
1=Input PGA muted (and disconnected from
the following input BOOST stage).
Input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = 35.25dB
ALC function select:
0=ALC off (PGA gain set by INPPGAVOL
register bits)
1=ALC on (ALC controls PGA gain)
Input microphone PGA enable
0 = disabled
1 = enabled
DESCRIPTION
PP, Rev 3.3, December 2007
DESCRIPTION
st
zero cross after gain
WM8941
21
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