WM8941GEFL WOLFSON [Wolfson Microelectronics plc], WM8941GEFL Datasheet - Page 26

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WM8941GEFL

Manufacturer Part Number
WM8941GEFL
Description
Mono CODEC with Speaker Driver and Video Buffer
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet

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WM8941
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Table 11 ADC Enable
Table 12 ADC Polarity
SELECTABLE HIGH PASS FILTER
Table 13 ADC Filter Select
The ADC is enabled by the ADCEN register bit.
The polarity of the output signal can also be changed under software control using the ADCPOL
register bit.
A selectable high pass filter is provided. To disable this filter set HPFEN=0. The filter has two
modes controlled by HPFAPP. In Audio Mode (HPFAPP=0) the filter is first order, with a cut-off
frequency of 3.7Hz. In Application Mode (HPFAPP=1) the filter is second order, with a cut-off
frequency selectable via the HPFCUT register. The cut-off frequencies when HPFAPP=1 are shown
in Table 14.
R2
Power
management 2
R14
ADC Control
R14
ADC Control
REGISTER
ADDRESS
REGISTER
REGISTER
ADDRESS
ADDRESS
8
7
6:4
0
0
BIT
BIT
BIT
ADCEN
ADCPOL
HPFEN
HPFAPP
HPFCUT
LABEL
LABEL
LABEL
0
DEFAULT
1
0
000
DEFAULT
0
DEFAULT
0 = ADC disabled
1 = ADC enabled
High Pass Filter Enable
0=disabled
1=enabled
Select audio mode or application mode
0=Audio mode (1
1=Application mode (2
HPFCUT)
Application mode cut-off frequency
See Table 14 for details.
1=inverted
0=normal
DESCRIPTION
PP, Rev 3.3, December 2007
DESCRIPTION
DESCRIPTION
st
order, fc = ~3.7Hz)
nd
order, fc =
Pre Production
26

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