WM8768_10 WOLFSON [Wolfson Microelectronics plc], WM8768_10 Datasheet - Page 13

• Manufacturer Part Number: WM8768_10
• Description: 24-bit, 192kHz 8-Channel DAC
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
DEVICE DESCRIPTION
INTRODUCTION
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PCM AUDIO DATA SAMPLING RATES
WM8768 is a complete 8-channel DAC including digital interpolation and decimation filters and
switched capacitor multi-bit sigma delta DACs with digital volume controls on each channel and
output smoothing filters.
The device is implemented as four separate stereo DACs in a single package and controlled by a
single interface.
Each stereo DAC has its own data input DIN1/2/3/4. DAC word clock LRCLK, DAC bit clock BCLK
and DAC master clock MCLK are shared between them.
The Audio Interface may be configured to operate in either master or slave mode. In Slave mode,
LRCLK and BCLK are all inputs. In Master mode, LRCLK and BCLK are all outputs.
Each DAC has its own digital volume control that is adjustable in 0.5dB steps. The digital volume
controls may be operated independently. In addition, a zero cross detect circuit is provided for each
DAC for the digital volume controls. The digital volume control detects a transition through the zero
point before updating the volume. This minimises audible clicks and ‘zipper’ noise as the gain values
change.
Control of internal functionality of the device is by 3-wire serial or pin programmable control interface.
The software control interface may be asynchronous to the audio data interface as control data will
be re-synchronised to the audio processing internally.
Operation using master clocks of 128fs, 192fs, 256fs, 384fs, 512fs, 768fs or 1152fs is provided for
the DAC In Slave mode selection between clock rates is automatically controlled. Audio sample rates
(fs) from less than 8ks/s up to 192ks/s are allowed for the DAC, provided the appropriate master
clock is input.
In PCM mode, the audio data interface supports right justified, left justified and I
justified, one bit delayed) interface formats along with a highly flexible DSP serial port interface.
In a typical digital audio system there is only one central clock source producing a reference clock to
which all audio data processing is synchronised. This clock is often referred to as the audio system’s
Master Clock. The external master system clock can be applied directly through the DAC MCLK input
pin(s) with no software configuration necessary
The DAC master clock for WM8768 supports audio sampling rates from 128fs to 1152fs, where fs is
the audio sampling frequency (LRCLK) typically 32kHz, 44.1kHz, 48kHz, 96kHz or 192kHz. The
master clock is used to operate the digital filters and the noise shaping circuits.
In Slave mode the WM8768 has a master clock detection circuit that automatically determines the
relationship between the system clock frequency and the sampling rate (to within +/- 32 master
clocks). If there is a greater than 32 clocks error the interface defaults to 1152fs mode.
WM8768 is tolerant of phase variations or jitter on the master clock. Table 6 shows the typical master
clock frequency inputs for the WM8768.
The signal processing for the WM8768 typically operates at an oversampling rate of 128fs. The
exception to this is for operation with a 128/192fs system clock, e.g. for 192kHz operation, when the
oversampling rate is 64fs.
PD Rev 4.3 July 2010
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WM8768
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