WM8986_07 WOLFSON [Wolfson Microelectronics plc], WM8986_07 Datasheet - Page 16

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WM8986_07

Manufacturer Part Number
WM8986_07
Description
Multimedia DAC With Class D Headphone and Line Out
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
WM8986
CONTROL INTERFACE TIMING – 3-WIRE MODE
w
Test Conditions
DCVDD = 1.8V, DBVDD = AVDD1 = AVDD2 = 3.3V, DGND = AGND1 = AGND2 = 0V, T
MCLK = 256fs, 24-bit data, unless otherwise stated.
PARAMETER
Program Register Input Information
SCLK rising edge to CSB rising edge
SCLK pulse cycle time
SCLK pulse width low
SCLK pulse width high
SDIN to SCLK set-up time
SCLK to SDIN hold time
CSB pulse width low
CSB pulse width high
CSB rising to SCLK rising
Pulse width of spikes that will be suppressed
3-wire mode is selected by connecting the MODE pin high.
Figure 5 Control Interface Timing – 3-Wire Serial Control Mode
SYMBOL
t
t
t
t
t
t
t
t
t
DHO
SCS
SCY
SCL
SCH
DSU
CSL
CSH
CSS
t
ps
MIN
200
80
80
80
40
40
40
40
40
0
A
=+25
o
C, Slave Mode, fs=48kHz,
TYP
PP, Rev 3.1, February 2007
MAX
5
Pre-Production
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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