WM8986_07 WOLFSON [Wolfson Microelectronics plc], WM8986_07 Datasheet - Page 63
WM8986_07
Manufacturer Part Number
WM8986_07
Description
Multimedia DAC With Class D Headphone and Line Out
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8986_07.pdf
(87 pages)
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Pre-Production
POWER MANAGEMENT
w
SAVING POWER BY REDUCING OVERSAMPLING RATE
The default mode of operation of the DAC digital filters is in 64x oversampling mode. Under the
control of DACOSR128 the oversampling rate may be doubled. 64x oversampling results in a slight
decrease in noise performance compared to 128x but lowers the power consumption of the device.
Table 37 DAC Oversampling Rate Selection
LOW POWER MODE
If only limited functionality is required, the WM8986 can be put into a low power mode. In this mode,
the DSP core runs at half of the normal rate, reducing digital power consumption of the core by half.
For DAC low power only, 3D enhancement with 2-Band equaliser functionality is permitted, where
only Band 1 (low shelf) and Band 5 (high shelf) can be used. .
Table 38 DSP Core Low Power Mode Control
The register settings for this low-power mode are detailed below. The device will not enter low power
unless in this register configuration, regardless of M128ENB.
For pop-free operation of the device it is recommended to change the M128ENB low power
functionality only when both DACs are disabled, i.e. when DACENL=0 and DACENR=0.
Table 39 DSP Core Low Power Mode Register Settings
VMID
The analogue circuitry will not operate unless VMID is enabled. The impedance of the VMID resistor
string, together with the decoupling capacitor on the VMID pin will determine the start-up time of the
VMID circuit.
Table 40 VMID Impedance Control
BIASEN
The analogue amplifiers will not operate unless BIASEN is enabled.
Table 41 Analogue Bias Control
R10 (0Ah)
DAC control
R7 (07h)
Additional Ctrl
DAC low power
R1 (01h)
Power
management 1
R1 (01h)
Power
management 1
REGISTER
REGISTER
FUNCTION
ADDRESS
ADDRESS
REGISTER
REGISTER
ADDRESS
ADDRESS
3
8
M128ENB
DACENL
DACENR
1:0
3
REGISTER BITS
BIT
BIT
BIT
BIT
VMIDSEL
BIASEN
LABEL
LABEL
DACOSR128
M128ENB
LABEL
LABEL
0
DEFAULT
0
1
1
00
DEFAULT
SETTING
0
0
DEFAULT
DEFAULT
Analogue amplifier bias control
0 = disabled
1 = enabled
Reference string impedance to VMID pin
00= off (250kΩ VMID to AGND1)
01=75kΩ
10=300kΩ
11=5kΩ
Either or both of DACENL and
DACENR must be set (mono or
stereo mode)
DAC oversample rate select
0 = 64x (lowest power)
1 = 128x (best SNR)
0 = low power mode enabled
1 = low power mode disabled
DESCRIPTION
DESCRIPTION
PP, Rev 3.1, February 2007
DESCRIPTION
DESCRIPTION
DESCRIPTION
WM8986
63
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