WM8523GEDT WOLFSON [Wolfson Microelectronics plc], WM8523GEDT Datasheet - Page 26
![no-image](/images/no-image-200.jpg)
WM8523GEDT
Manufacturer Part Number
WM8523GEDT
Description
24-bit 192kHz Stereo DAC with 2Vrms Ground Referenced Line Output
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8523GEDT.pdf
(51 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WM8523GEDT/R
Manufacturer:
WOLFSON
Quantity:
20 000
WM8523
DIGITAL AUDIO DATA SAMPLING RATES
Table 11 MCLK Frequencies and Audio Sample Rates
w
RATE LRCLK
SAMPLING
176.4kHz
44.1kHz
88.2kHz
192kHz
32kHz
48kHz
96kHz
8kHz
Unavailable
Unavailable
Unavailable
Unavailable
11.2896
22.5792
12.288
24.576
128fs
The external master clock is applied directly to the MCLK input pin. In a system where there are a
number of possible sources for the reference clock, it is recommended that the clock source with the
lowest jitter be used for the master clock to optimise the performance of the WM8523.
In slave mode the WM8523 has a detection circuit that automatically determines the relationship
between the master clock frequency (MCLK) and the sampling rate (LRCLK), to within ±32 system clock
periods. The MCLK must be synchronised with the LRCLK, although the device is tolerant of phase
variations or jitter on the MCLK.
If the device is configured in slave mode using auto-detect or in hardware mode, and during sample rate
change the ratio between MCLK and LRCLK varies more than once within 1026 LRCLK periods, then it is
recommended that the device be taken into the standby state or the off state before the sample rate
change and held in standby until the sample rate change is complete. This will ensure correct operation
of the detection circuit on the return to the enabled state. For details on the standby state, please refer to
the Software Control Interface (software mode, page 17) and Power Up and Down Control In Hardware
Mode section of the datasheet (hardware mode, on page 33).
The DAC supports MCLK to LRCLK ratios of 128fs to 1152fs and sampling rates of 8kHz to 192kHz,
provided the internal signal processing of the DAC is programmed to operate at the correct rate.
Table 11 shows typical master clock frequencies and sampling rates supported by the WM8523 DAC.
Unavailable
Unavailable
Unavailable
Unavailable
16.9344
33.8688
18.432
36.864
192fs
Unavailable
Unavailable
11.2896
22.5792
MASTER CLOCK FREQUENCY (MHz)
12.288
24.576
256fs
2.048
8.192
Unavailable
Unavailable
16.9344
33.8688
18.432
36.864
12.288
384fs
3.072
Unavailable
Unavailable
Unavailable
Unavailable
22.5792
16.384
24.576
512fs
4.096
Unavailable
Unavailable
Unavailable
Unavailable
33.8688
24.576
36.864
768fs
6.144
PD, Rev 4.1, August 2011
Production Data
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
1152fs
36.864
9.216
26