WM8523GEDT WOLFSON [Wolfson Microelectronics plc], WM8523GEDT Datasheet - Page 33

• Manufacturer Part Number: WM8523GEDT
• Description: 24-bit 192kHz Stereo DAC with 2Vrms Ground Referenced Line Output
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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POWER UP AND DOWN CONTROL IN HARDWARE MODE
In hardware mode the MCLK, BCLK and MUTE
or down, and this is summarised in Figure 25 below.
Figure 25 Hardware Power Sequence Diagram
Off to Enable
To power up the device to enabled, start MCLK and BCLK and set MUTE
Off to Standby
To power up the device to standby, start MCLK and BCLK and set MUTE
standby mode, BCLK can be disabled and the device will remain in standby mode.
Standby to Enable
To transition from the standby state to the enabled state, set the MUTE
Enable to Standby
To power down to a standby state leaving the charge pump running, either set the MUTE
stop BCLK. MCLK must continue to run in these situations. The device will automatically mute and
power down quietly in either case.
Note: It is recommended that the device is placed in standby mode before sample rate change if the sample rate changes more than once
in 1026 LRCLK periods, as detailed in Digital Audio Data Sampling Rates on page 26.
Enable to Off
To power down the device completely, stop MCLK at any time. It is recommended that the device is
placed into standby mode as described above before stopping MCLK to allow a quiet shutdown.
For the timing of the off state to enabled state transition (power on to audio out timing), and the enabled
state to standby state transition (the shutdown timing), please refer to WTN0302.
¯ ¯ ¯ ¯ ¯ pins are monitored to control how the device powers up
¯ ¯ ¯ ¯ ¯ pin to logic 1 and start BCLK.
¯ ¯ ¯ ¯ ¯ = 1.
¯ ¯ ¯ ¯ ¯ = 0. Once the device is in
PD, Rev 4.1, August 2011
¯ ¯ ¯ ¯ ¯ pin to logic 0 or
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