SI6924AEDQ_08 VISHAY [Vishay Siliconix], SI6924AEDQ_08 Datasheet

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SI6924AEDQ_08

Manufacturer Part Number
SI6924AEDQ_08
Description
N-Channel 2.5-V (G-S) Battery Switch, ESD Protection
Manufacturer
VISHAY [Vishay Siliconix]
Datasheet
DESCRIPTION
The Si6924AEDQ is a dual N-Channel MOSFET with ESD
protection and gate over-voltage protection circuitry
incorporated into the MOSFET. The device is designed for
use in Lithium Ion battery pack circuits. The common-drain
construction takes advantage of the typical battery pack
topology, allowing a further reduction of the device’s on-
resistance. The 2-stage input protection circuit is a unique
design, consisting of two stages of back-to-back zener
diodes separated by a resistor. The first stage diode is
designed to absorb most of the ESD energy. The second
APPLICATION CIRCUITS
Document Number: 72215
S-81056-Rev. B, 12-May-08
*Thermal connection to drain pins is required to achieve specific performance
PRODUCT SUMMARY
V
DS
Figure 1. Typical Use In a Lithium Ion Battery Pack
28
Overvoltage
(V)
Protection
ESD and
N-Channel 2.5-V (G-S) Battery Switch, ESD Protection
0.033 at V
0.038 at V
0.042 at V
Battery Protection Circuit
R
DS(on)
GS
GS
GS
(Ω)
= 4.5 V
= 3.0 V
= 2.5 V
Overvoltage
Protection
ESD and
I
D
4.6
4.3
4.1
(A)
stage diode is designed to protect the gate from any
remaining ESD energy and over-voltages above the gates
inherent safe operating range. The series resistor used to
limit the current through the second stage diode during over
voltage conditions has a maximum value which limits the
input current to ≤ 10 mA at 14 V and the maximum t
µs. The Si6924AEDQ has been optimized as a battery or
load switch in Lithium Ion applications with the advantage of
both a 2.5 V R
maximum rating.
FEATURES
• Halogen-free
• Low R
• V
• Exceeds 2 kV ESD Protection
• 28 V V
• Symmetrical Voltage Blocking (Off Voltage)
Figure 2. Input ESD and Overvoltage Protection Circuit
GS
Max Rating: 14 V
DS(on)
DS
Gate-Current vs. Gate-Source Voltage, Page 3.
Rated
DS(on)
G
S
**R typical value is 3.3
See Typical Characteristics,
rating and a safe 14 V gate-to-source
R**
Si6924AEDQ
Vishay Siliconix
by design.
D
www.vishay.com
RoHS
COMPLIANT
off
to 12
1

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SI6924AEDQ_08 Summary of contents

Page 1

N-Channel 2.5-V (G-S) Battery Switch, ESD Protection PRODUCT SUMMARY V (V) R (Ω) DS DS(on) 0.033 4 0.038 3 0.042 2 DESCRIPTION The Si6924AEDQ ...

Page 2

Si6924AEDQ Vishay Siliconix FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION TSSOP Si6924AEDQ Top View Ordering Information: Si6924AEDQ-T1-GE3 (Lead (Pb)-free and Halogen-free) Figure 3. ABSOLUTE MAXIMUM RATINGS T Parameter Drain-Source Voltage, ...

Page 3

SPECIFICATIONS °C, unless otherwise noted J Parameter Static Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current b On-State Drain Current b Drain-Source On-State Resistance b Forward Transconductance b Diode Forward Voltage a Dynamic Total Gate ...

Page 4

Si6924AEDQ Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 0.00 0.25 0.50 0. Drain-to-Source Voltage (V) DS Output Characteristics 0.05 0. 2.5 V 0.03 GS 0.02 V ...

Page 5

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 0.10 0.08 0.06 0.04 0.02 0. Gate-to-Source Voltage (V) - Gate-to-Source Voltage (V) GS On-Resistance vs. Gate-to-Source Voltage 0.001 0.01 ...

Page 6

Si6924AEDQ Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of ...

Page 7

JEDEC Part Number: MO-153 R 0. Corners 0.10 (4 Corners) Document Number: 71201 06-Jul- oK1 ECN: S-03946—Rev. G, 09-Jul-01 L1 DWG: 5844 Package Information Vishay Siliconix Dim Min Nom Max A – – ...

Page 8

The Next Step in Surface-Mount Power MOSFETs Wharton McDaniel and David Oldham When Vishay Siliconix introduced its LITTLE FOOT MOSFETs, it was the first time that power MOSFETs had been offered in a true surface-mount package, the SOIC. LITTLE FOOT ...

Page 9

AN1001 Vishay Siliconix Because the TSSOP has a fine pitch foot print, the pad layout is somewhat more demanding than the layout of the SOIC. Careful attention must be paid to silkscreen-to-pad and soldermask-to-pad clearances. Also, fiduciary marks may be ...

Page 10

Mounting LITTLE FOOT Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach ...

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RECOMMENDED MINIMUM PADS FOR TSSOP-8 Return to Index Return to Index Document Number: 72611 Revision: 21-Jan-08 0.092 (2.337) 0.026 (0.660) 0.014 0.012 (0.356) (0.305) Recommended Minimum Pads Dimensions in Inches/(mm) Application Note 826 Vishay Siliconix www.vishay.com 27 ...

Page 12

... Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’ ...

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