ADUM1250_VD AD [Analog Devices], ADUM1250_VD Datasheet - Page 10

• Manufacturer Part Number: ADUM1250_VD
• Description: Hot Swappable, Dual I2C Isolators
• Manufacturer: AD [Analog Devices]

ADuM1250/ADuM1251
APPLICATIONS INFORMATION
FUNCTIONAL DESCRIPTION
The ADuM1250/ADuM1251 interfaces on each side to a
bidirectional I
into two unidirectional channels communicating in opposing
directions via a dedicated iCoupler isolation channel for each.
One channel (the bottom channel of each channel pair shown
in Figure 6) senses the voltage state of the Side 1 I
transmits its state to its respective Side 2 I
Both the Side 1 and the Side 2 I
to an I
on either causes the opposite pin to be pulled low enough to
comply with the logic low threshold requirements of other I
devices on the bus. Avoidance of I
by an input low threshold at SDA
least 50 mV less than the output low signal at the same pin. This
prevents an output logic low at Side 1 being transmitted back to
Side 2 and pulling down the I
Since the Side 2 logic levels/thresholds are standard I
multiple ADuM1250/ADuM1251 devices connected to a bus by
their Side 2 pins can communicate with each other and with other
devices having I
I
situations in which a component's logic levels do not necessarily
meet the requirements of the I
component to communication with an I
I
levels meet the requirements of the I
However, since the Side 1 pin has a modified output level/input
threshold, this side of the ADuM1250/ADuM1251 can only
communicate with devices conforming to the I
other words, Side 2 of the ADuM1250/ADuM1251 is I
while Side 1 is only I
The output logic low levels are independent of the V
V
independent of V
Side 2 is designed to be at 0.3 V
ments. The Side 1 and Side 2 pins have open-collector outputs
whose high levels are set via pull-up resistors to their respective
supply voltages.
GND
SDA
SCL
V
2
2
C compatibility and I
C compliance refers to situations in which a component's logic
DD1
DD2
1
1
1
voltages. The input logic low threshold at Side 1 is also
1
2
4
3
2
C bus operating in the 3.0 V to 5.5 V range. A logic low
DECODE
ENCODE
DECODE
ENCODE
2
C signal. Internally, the I
2
C compatibility. A distinction is made between
Figure 6. ADuM1250 Block Diagram
DD1
. However, the input logic low threshold at
2
C-compatible.
2
C compliance. I
2
ENCODE
DECODE
ENCODE
DECODE
C bus.
2
C specification but still allow the
2
DD2
C pins are designed to interface
1
2
, consistent with I
or SCL
C bus contention is ensured
2
C specification.
2
2
C compatibility refers to
2
C interface is split
C-compliant device.
1
2
C pin.
guaranteed to be at
8
7
6
5
V
SDA
SCL
GND
2
C standard. In
DD2
2
2
2
2
C pin and
2
C-compliant,
2
DD1
2
C require-
C values,
R2
C
and
L
R2
C
2
Rev. D | Page 10 of 12
C
L
STARTUP
Both the V
feature to prevent the signal channels from operating unless
certain criteria are met. This avoids the possibility of input logic
low signals from pulling down the I
power-up/power-down.
The two criteria that must be met in order for the signal
channels to be enabled are as follows:
•
•
Until both of these criteria are met for both supplies, the
ADuM1250/ADuM1251 outputs are pulled high, ensuring a
startup that avoids any disturbances on the bus. Figure 7 and
Figure 8 illustrate the supply conditions for fast and slow input
supply slew rates.
OPERATING SUPPLY, 3.0V
MINIMUM VALID SUPPLY, 2.5V
MIN. VALID SUPPLY, 2.5V
Both supplies must be at least 2.5 V.
At least 40 μs must elapse after both supplies exceed the
internal startup threshold of 2.0 V.
MINIMUM RECOMMENDED
OPERATING SUPPLY, 3.0V
MIN. RECOMMENDED
Figure 7. Start-Up Condition, Supply Slew Rate > 12.5 V/ms
Figure 8. Start-Up Condition, Supply Slew Rate < 12.5 V/ms
INTERNAL STARTUP
THRESHOLD, 2.0V
DD1
INTERNAL STARTUP
THRESHOLD, 2.0V
and V
DD2
supplies have an undervoltage lockout
2
C bus inadvertently during
40µs
40µs
SUPPLY VALID
SUPPLY VALID