M52S64322A-10BG ESMT [Elite Semiconductor Memory Technology Inc.], M52S64322A-10BG Datasheet - Page 9
M52S64322A-10BG
Manufacturer Part Number
M52S64322A-10BG
Description
512K x 32 Bit x 4 Banks Mobile Synchronous DRAM
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet
1.M52S64322A-10BG.pdf
(47 pages)
- Current page: 9 of 47
- Download datasheet (2Mb)
EXTENDED MODE REGISTER SET (EMRS)
The extended mode register stores for selecting PASR; TCSR; DS. The extended mode register set must be done before any
active command after the power up sequence. The extended mode register is written by asserting low on CS , RAS , CAS , WE
and high on BA1,low on BA0(The SDRAM should be in all bank precharge with CKE already high prior to writing into the
extended more register). The state of address pins A0~An in the same cycle as CS , RAS , CAS , WE going low is written in
the extended mode register. Refer to the table for specific codes.
The extended mode register can be changed by using the same command and clock cycle requirements during operations as
long as all banks are in the idle state. The default value extended mode register is defined as half driving strength and all banks
refreshed.
BA1 BA0 A10 A9
Elite Semiconductor Memory Technology Inc.
1
0
0
0
A8
0
A7
0
A6
DS
A5
A4 A3
X
X
A2
PASR
A1
A0
Extended Mode Register Set
DS
Internal TCSR
Address bus
PASR
A2-A0
A6-A5
000
001
010
100
101
011
111
00
01
10
11
Publication Date: Aug. 2009
Revision: 1.3
2 Bank (BankA& BankB) or
Self Refresh Coverage
1/2 Bank (BankA) or
M52S64322A
1 Bank (BankA) or
A10=BA0=BA1=0
Driver Strength
Remark R: Reserved
(BA0=BA1=0)
Full Strength
1/2 Strength
1/4 Strength
X = Don’t care
(BA1=0)
4Bank
R
R
R
R
9/47
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