F25L08PA-100DG ESMT [Elite Semiconductor Memory Technology Inc.], F25L08PA-100DG Datasheet - Page 15

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F25L08PA-100DG

Manufacturer Part Number
F25L08PA-100DG
Description
3V Only 8 Mbit Serial Flash Memory with Dual
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet
ESMT
64K Byte Block Erase
The 64K-byte Block Erase instruction clears all bits in the
selected block to FFH. A Block Erase instruction applied to a
protected memory area will be ignored. Prior to any Write
operation, the Write Enable (WREN) instruction must be
executed. CE must remain active low for the duration of the any
command sequence. The Block Erase instruction is initiated by
executing an 8-bit command, D8H, followed by address bits [A
4K Byte Sector Erase
The Sector Erase instruction clears all bits in the selected sector
to FFH. A Sector Erase instruction applied to a protected memory
area will be ignored. Prior to any Write operation, the Write
Enable (WREN) instruction must be executed. CE must remain
active low for the duration of the any command sequence. The
Sector Erase instruction is initiated by executing an 8-bit
command, 20H, followed by address bits [A
Elite Semiconductor Memory Technology Inc.
Figure 13: 64K-byte Block Erase Sequence
Figure 14: 32K-byte Sector Erase Sequence
SCK
SO
CE
SI
MODE0
MODE3
MSB
0 1 2 3 4 5 6 7 8
23
-A
0
]. Address bits
20
HIGH IMPENANCE
23
MSB
ADD.
-A
used to determine the block address (BA
bits can be V
instruction is executed. The user may poll the Busy bit in the
Software Status Register or wait T
internal self-timed Block Erase cycle. See Figure 13 for the Block
Erase sequence.
[A
the sector address (SA
V
The user may poll the Busy bit in the Software Status Register or
wait T
cycle. See Figure 14 for the Sector Erase sequence.
IH
15 16
MS
0
. CE must be driven high before the instruction is executed.
]. Address bits [A
-A
SE
12
ADD.
for the completion of the internal self-timed Sector Erase
] (A
23 24
MS
IL
= Most Significant address) are used to determine
or V
ADD.
MS
IH
31
-A
X
. CE must be driven high before the
), remaining address bits can be V
16
] (A
Publication
Revision: 1.7
MS
= Most Significant address) are
BE
for the completion of the
F25L08PA
Date: Jul. 2009
X
), remaining address
15/32
IL
or

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