F25L16PA-100DG ESMT [Elite Semiconductor Memory Technology Inc.], F25L16PA-100DG Datasheet - Page 10

• Manufacturer Part Number: F25L16PA-100DG
• Description: 3V Only 16 Mbit Serial Flash Memory with Dual
• Manufacturer: ESMT [Elite Semiconductor Memory Technology Inc.]

ESMT
Note:
Elite Semiconductor Memory Technology Inc.
10. The Write-Enable (WREN) instruction and the Write-Status-Register (WRSR) instruction must work in conjunction of each
11. The Manufacture ID and Device ID output will repeat continuously until CE terminates the instruction.
12. Dual commands use bidirectional IO pins. D
13. Dual output data:
1. Operation: S
2. X = Dummy Input Cycles (V
3. One bus cycle is eight clock periods.
4. Sector Earse addresses: use A
5. To continue programming to the next sequential address location, enter the 8-bit command, followed by the data to be
6. The Read-Status-Register is continuous with ongoing clock cycles until terminated by a low to high transition on CE .
7. The Enable-Write-Status-Register (EWSR) instruction and the Write-Status-Register (WRSR) instruction must work in
8. The Read-Electronic-Signature is continuous with on going clock cycles until terminated by a low to high transition on CE .
9. The Jedec-Read-ID is output first byte 8CH as manufacture ID; second byte 20H as top memory type; third byte 15H as
Block Earse addresses: use A
programmed.
conjunction of each other. The WRSR instruction must be executed immediately (very next bus cycle) after the EWSR
instruction to make both instructions effective.
memory capacity.
other. The WRSR instruction must be executed immediately (very next bus cycle) after the WREN instruction to make both
instructions effective. Both EWSR and WREN can enable WRSR, user just need to execute one of it. A successful WRSR can
reset WREN.
IO
IO
0
1
= (D
= (D
6
7
, D
, D
IN
D
= Serial In, S
4
5
OUT0
, D
, D
2
3
, D
, D
0
1
), (D
), (D
OUT
IL
6
7
, D
, D
or V
MS
D
MS
= Serial Out, Bus Cycle 1 = Op Code
4
5
OUT1
-A
, D
, D
IH
-A
16
); - = Non-Applicable Cycles (Cycles are not necessary); cont. = continuous
2
3
12
, remaining addresses can be V
, D
, D
, remaining addresses can be V
0
1
)
)
OUT
and cont. are serial data out; others are serial data in.
IL
IL
or V
or V
IH
IH
Publication Date: Jul. 2009
Revision: 1.4
F25L16PA
10/33