AT83C24 ATMEL Corporation, AT83C24 Datasheet - Page 6

• Manufacturer Part Number: AT83C24
• Description: Smart Card Reader Interface with Power Management
• Manufacturer: ATMEL Corporation

Operational Modes
TWI Bus Control
TWI Commands
Frame Structure
6
AT83C24
The Atmel Two-wire Interface (TWI) interconnects components on a unique two-wire
bus, made up of one clock line and one data line with speeds of up to 400 Kbits per sec-
ond, based on a byte-oriented transfer format.
The TWI-bus interface can be used:
The structure of the TWI bus data frames is made of one or a series of write and read
commands completed by STOP.
Write commands to the AT83C24 have the structure:
Read commands to the AT83C24 have the structure:
The ADDRESS BYTE is sampled on A2/CK, A1/RST, A0/3V after each reset
(hard/soft/general call) but A2/CK, A1/RST, A0/3V can be used for transparent mode
after the reset.
Figure 1. Data transfer on TWI bus
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–
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ADDRESS BYTE + COMMAND BYTE + DATA BYTE(S)
ADDRESS BYTE + DATA BYTE(S)
SDA
SCL
To configure the AT83C24
To select the operating mode of the card: 1.8V, 3V or 5V
To configure the automatic activation sequence
To start or stop sessions (activation and de-activation sequences)
To initiate a warm reset
To control the clock to the card in active mode
To control the clock to the card in stand-by mode (stop LOW, stop HIGH or
running)
To enter or leave the card stand-by or power-down modes
To select the interface (connection to the host I/O / C4/ C8)
To request the status (card present or not, over-current and out of range
supply voltage occurrence)
To drive and monitor the card contacts by software
To accurately measure the ATR delay when automatic activation is used
start condition
1
2
Adresse byte
3
4
5
6
7
acknowledgement
from slave
8
9
command
and/or data
stop condition
4234E–SCR–09/04