AT89C5131-PLTIL ATMEL Corporation, AT89C5131-PLTIL Datasheet - Page 107
AT89C5131-PLTIL
Manufacturer Part Number
AT89C5131-PLTIL
Description
8-bit Flash Microcontroller with Full Speed USB Device
Manufacturer
ATMEL Corporation
Datasheet
1.AT89C5131-PLTIL.pdf
(176 pages)
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Table 81. Status for Master Receiver Mode
4136B–USB–09/03
Status Code
(SSCS)
60h
68h
70h
78h
80h
88h
90h
98h
Status of the TWI Bus
own SLA+W has been
with own SLA+W; data
with own SLA+W; data
with general call; data
with general call; data
Previously addressed
Previously addressed
Previously addressed
Previously addressed
SLA+R/W as master;
SLA+R/W as master;
and TWI Hardware
General call address
been received; ACK
general call address
NOT ACK has been
NOT ACK has been
has been received;
has been received;
has been received;
has been received;
has been received;
has been received;
received; ACK has
has been returned
Own SLA+W has
Arbitration lost in
Arbitration lost in
ACK has been
ACK has been
ACK has been
ACK has been
been returned
returned
returned
returned
returned
returned
returned
Read data byte or
Read data byte or
Read data byte or
Read data byte or
Read data byte or
Read data byte or
Read data byte or
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
To/from SSDAT
Read data byte
Read data byte
Read data byte
or
or
or
or
or
Application Software Response
STA
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
0
1
1
To SSCON
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by TWI Software
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own SLA will
be recognised; GCA will be recognised if GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition will
be transmitted when the bus becomes free
Switched to the not addressed slave mode; own SLA will
be recognised; GCA will be recognised if GC=logic 1. A
START condition will be transmitted when the bus
becomes free
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own SLA will
be recognised; GCA will be recognised if GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition will
be transmitted when the bus becomes free
Switched to the not addressed slave mode; own SLA will
be recognised; GCA will be recognised if GC=logic 1. A
START condition will be transmitted when the bus
becomes free
AT89C5131
107
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