IS24C32-3 Integrated Silicon Solution Inc, IS24C32-3 Datasheet - Page 2
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IS24C32-3
Manufacturer Part Number
IS24C32-3
Description
65/536-bit/32/768-bit 2-WIRE SERIAL CMOS EEPROM
Manufacturer
Integrated Silicon Solution Inc
Datasheet
1.IS24C32-3.pdf
(11 pages)
IS24C32-2/3
IS24C64-2/3
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTIONS
SCL
This input clock pin is used to synchronize the data
transfer to and from the device.
SDA
The SDA is a Bi-directional pin used to transfer addresses
and data into and out of the device. The SDA pin is an open
drain output and can be wire-Ored with other open drain
or open collector outputs. The SDA bus requires a pullup
resistor to Vcc.
A0, A1, A2
The A0, A1 and A2 are the device address inputs that are
hardwired or left not connected for hardware compatibility
2
A0-A2
SDA
SCL
WP
Vcc
GND
GND
SDA
SCL
Vcc
WP
5
6
7
4
8
Address Inputs
Serial Address/Data I/O
Serial Clock Input
Write Protect Input
Power Supply
Ground
nMOS
SLAVE ADDRESS
COMPARATOR
REGISTER &
WORD ADDRESS
COUNTER
ACK
CONTROL
LOGIC
PIN CONFIGURATION
8-Pin DIP and SOIC
with the 24C16. When pins are hardwired, as many as
eight 32K/64K devices may be addressed on a single bus
system. When the pins are not hardwired, the default A0,
A1,and A2 are zero..
WP
WP is the Write Protect pin. If the WP pin is tied to Vcc
the entire array becomes Write Protected (Read only).
When WP is tied to GND or left floating normal read/write
operations are allowed to the device.
Integrated Silicon Solution, Inc. — 1-800-379-4774
GND
A0
A1
A2
Clock
DI/O
1
2
3
4
PRELIMINARY INFORMATION Rev. 00B
TIMING & CONTROL
>
HIGH VOLTAGE
GENERATOR,
DECODER
REGISTER
EEPROM
ARRAY
8
7
6
5
DATA
Y
ISSI
VCC
WP
SCL
SDA
04/04/01
®