XC68HC705JB3 Motorola, XC68HC705JB3 Datasheet - Page 105

• Manufacturer Part Number: XC68HC705JB3
• Description: MICROCONTROLLER
• Manufacturer: Motorola

12.1
12.1.1 Inherent
12.1.2 Immediate
MC68HC05JB3
REV 1
This section describes the addressing modes and instruction types.
ADDRESSING MODES
The CPU uses eight addressing modes for flexibility in accessing data. The
addressing modes define the manner in which the CPU finds the data required to
execute an instruction. The eight addressing modes are the following:
Inherent instructions are those that have no operand, such as return from interrupt
(RTI) and stop (STOP). Some of the inherent instructions act on data in the CPU
registers, such as set carry flag (SEC) and increment accumulator (INCA).
Inherent instructions require no memory address and are one byte long.
Immediate instructions are those that contain a value to be used in an operation
with the value in the accumulator or index register. Immediate instructions require
no memory address and are two bytes long. The opcode is the first byte, and the
immediate data value is the second byte.
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Inherent
Immediate
Direct
Extended
Indexed, No Offset
Indexed, 8-Bit Offset
Indexed, 16-Bit Offset
Relative
INSTRUCTION SET
INSTRUCTION SET
November 5, 1998
SECTION 12
GENERAL RELEASE SPECIFICATION
MOTOROLA
12-1