HIP4080 Intersil Corporation, HIP4080 Datasheet
HIP4080
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HIP4080 Summary of contents
Page 1
... C with bottom two external power MOSFETs, maintaining the upper power MOSFETs off. Since it can switch at frequencies up to 1MHz, the HIP4080 is well suited for driving Voice Coil Motors, switching amplifiers in class D high-frequency switching audio amplifiers and power supplies. HIP4080 can also drive medium voltage brush motors, and two HIP4080s can be used to drive high performance step- per motors, since the short minimum “ ...
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... OUT 6 IN HDEL 9 LDEL HIP4080 80V BHO BHS LOAD BLO ALO AHS AHO GND (1/2 HIP4080) AHB 10 DRIVER AHO LEVEL SHIFT 11 AND LATCH AHS 12 TURN-ON DELAY DRIVER ALO TURN-ON 13 DELAY ALS 14 2 HIGH VOLTAGE BUS 80V ...
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... Typical Application (Hysteresis Mode Switching) 1 BHB 12V 2 HEN DIS 3 DIS OUT HDEL LDEL 9 AHB 10 GND HIP4080 20 BHO 19 BHS 18 BLO 17 BLS 12V CC ALS 14 ALO 13 12 AHS AHO 80V LOAD GND ...
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... Low Level Output Current INPUT PINS: DIS Low Level Input Voltage High Level Input Voltage Input Voltage Hysteresis HIP4080 Thermal Information Thermal Resistance (Typical, Note 1) +0.3V SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Disable to Upper Enable (DIS - AHO and BHO) HEN-AHO, BHO Turn-off, Propagation Delay HEN-AHO, BHO Turn-on, Propagation Delay INPUT IN+ > IN- HEN HIP4080 = 12V AHB BHB SS ALS Unless Otherwise Specified (Continued) TEST CONDITIONS I ...
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... B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. 20 BHO B High-side Output. Connect to gate of B High-side power MOSFET. HIP4080 DESCRIPTION ). An internal 100 A pull- internal 100 A pull- will hold DIS high if this pin is not driven. ...
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... HEN-PHL DIS = 0 HEN IN+ > IN- ALO AHO BLO BHO T DLPLH T REF-PW DIS HEN = 1 IN+ > IN- ALO AHO BLO BHO T UEN HIP4080 DT T LPLH T HPLH (10% - 90%) (90% - 10%) FIGURE 1. BI-STATE MODE HEN-PLH FIGURE 2. HIGH SIDE CHOP MODE T DIS FIGURE 3. DISABLE FUNCTION ...
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... FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs FREQUENCY (LOAD = 1000pF) 1.8 1.4 1.0 0.6 0.2 -0.2 0 200 400 600 FREQUENCY (kHz) FIGURE NO-LOAD FLOATING SUPPLY BIAS AHB BHB CURRENT vs FREQUENCY HIP4080 12V AHB BHB 100K, and Unless Otherwise Specified HDEL ...
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... FIGURE 12. AHB - AHS, BHB - BHS NO-LOAD CHARGE PUMP VOLTAGE vs TEMPERATURE 400 380 360 340 320 300 -40 - JUNCTION TEMPERATURE ( FIGURE 14. DISABLE TO UPPER ENABLE T PROPAGATION DELAY vs TEMPERATURE HIP4080 12V AHB BHB 100K, and Unless Otherwise Specifi ...
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... JUNCTION TEMPERATURE ( FIGURE 18. UPPER TURN-OFF PROPAGATION DELAY T vs TEMPERATURE 90.0 80.0 70.0 60.0 50.0 40.0 -40 - JUNCTION TEMPERATURE ( FIGURE 20. LOWER TURN-OFF PROPAGATION DELAY T vs TEMPERATURE HIP4080 12V AHB BHB 100K, and Unless Otherwise Specified (Continued) HDEL LDEL ...
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... C o 500 250 125 BIAS SUPPLY VOLTAGE (V) FIGURE 26. LOW LEVEL OUTPUT VOLTAGE V SUPPLY AND TEMPERATURE AT 100mA HIP4080 12V AHB BHB 100K, and HDEL LDEL A 13.5 12.5 11.5 10.5 9.5 8.5 80 100 120 ...
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... SWITCHING FREQUENCY (kHz) FIGURE 30. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs FREQUENCY AND BUS VOLTAGE HIP4080 12V AHB BHB 100K, and HDEL LDEL A 500 200 100 ...
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... ENABLE pin is low after the under-voltage circuit is satisfied, the ENABLE pin will initiate the 10ms time delay during which the IN+ and IN- pins must cycle at least once. 3. Another product, HIP4080A, incorporates undervoltage circuitry which eliminates the need for the above power up circuitry. HIP4080 plished by controlling the lower turn-on delay pin, LDEL, while the chip is enabled, as shown in Figure 32 ...
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... LDEL AHS R24 10 11 AHB AHO R34 3 CR1 ALS O TO DIS CD4069UB 0.1MFD CD4069UB FIGURE 34. HIP4080 EVALUATION PC BOARD SCHEMATIC POWER SECTION R30 R31 ...
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... GND +12V CR2 + + C4 R22 U1 BHO R24 DIS BLO U2 BLS IN1 JMPR1 I JMPR2 O ALS JMPR3 R23 ALO IN2 JMPR4 R21 AHO O LDEL C3 ALS CR1 R33 R34 BLS FIGURE 35. HIP4080 EVALUATION BOARD SILKSCREEN B+ COM ...
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... After power is up the chip can be enabled by the ENABLE signal which pulls the DIS pin low. HIP4080 The HIP4080 does not have an input protocol like the HIP4081 that keeps both lower power MOSFETs off other than through the DIS pin. IN+ and IN- are inputs to a com- parator that control the bridge in such a way that only one of the lower power devices time, assuming DIS is low ...
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... V DD 12V, FINAL VALUE 8.5V TO 10.5V (ASSUMES 5% RESISTORS) ALI, BLI DIS 1.7V NOTE: 7. ALI and/or BLI may be high after t1, whereupon the ENABLE pin may also be brought high. FIGURE 38. HIP4080 V 12V, FINAL VALUE DD 8.3V TO 9.1V (ASSUMING 5% ZENER TOLERANCE) DIS LDEL =10ms t2 t1 NOTE: 8. Between t1 and t2 the IN+ and IN- inputs must cause the OUT pin to go through one complete cycle (transition order is not impor- tant) ...
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... The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimen- sions are not necessarily exact. HIP4080 M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE M ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com HIP4080 E20.3 (JEDEC MS-001-AD ISSUE D) ...