HIP6014 Intersil Corporation, HIP6014 Datasheet - Page 5

• Manufacturer Part Number: HIP6014
• Description: Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
• Manufacturer: Intersil Corporation

BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
PGND (Pin 16)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE (Pin 17)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
V
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition. Output rising 15% more
than the DAC-set voltage triggers a high output on this pin
and disables PWM gate drive circuitry.
RT (Pin 20)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
200kHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
to V
following equation:
Functional Description
Initialization
The HIP6014 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages. The POR monitors the bias
voltage at the V
OCSET pin. The level on OCSET is equal to V
voltage drop (see over-current protection). The POR function
initiates soft start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
+12V power source must exceed the rising V
before POR initiates operation.
Soft Start
The POR function initiates the soft start sequence. An internal
10 A current source charges an external capacitor (C
the SS pin to 4V. Soft start clamps the error amplifier output
Fs 200kHz
Fs 200kHz
CC
CC
(Pin 18)
reduces the switching frequency according to the
+
–
-------------------- -
R
-------------------- -
R
5 10
4 10
T
T
CC
k
k
pin and the input voltage (V
7
6
IN
T
) from this pin to GND, the nominal
and V
(R
(R
T
T
to 12V)
to GND)
5
CC
are equivalent and the
T
) from this pin
CC
IN
IN
threshold
less a fixed
) on the
SS
) on
HIP6014
(COMP pin) and reference input (+ terminal of error amp) to the
SS pin voltage. Figure 3 shows the soft start interval with
C
pin) controls the converter’s output voltage. At t
SS voltage reaches the valley of the oscillator’s triangle wave.
The oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitor(s). This
interval of increasing pulse width continues to t
output voltage, the clamp on the reference input controls the
output voltage. This is the interval between t
At t
output voltage is in regulation. This method provides a rapid
and controlled output voltage rise. The PGOOD signal toggles
‘high’ when the output voltage (V
DACOUT. The 2% hysteresis built into the power good
comparators prevents PGOOD oscillation due to nominal
output voltage ripple.
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFET’s on-resistance,
r
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
programs the over-current trip level. An internal 200 A current
sink develops a voltage across R
V
referenced to V
over-current function initiates a soft-start sequence. The soft-
start function discharges C
inhibits PWM operation. The soft-start function recharges C
and PWM operation resumes with the error amplifier clamped
to the SS voltage. Should an overload occur while recharging
C
charging C
DS(ON)
0V
0V
IN
SS
0V
SS
3
. When the voltage across the upper MOSFET (also
, the soft start function inhibits PWM operation while fully
= 0.1 F. Initially the clamp on the error amplifier (COMP
the SS voltage exceeds the DACOUT voltage and the
to monitor the current. This method enhances the
SS
FIGURE 3. SOFT START INTERVAL
to 4V to complete its cycle. Figure 4 shows this
SOFT-START
(1V/DIV.)
IN
) exceeds the voltage across R
t
1
TIME (5ms/DIV.)
PGOOD
(2V/DIV.)
SS
with a 10 A current sink and
t
2
SEN
OCSET
pin) is within 5% of
that is referenced to
t
3
2
and t
2
1
. With sufficient
in Figure 3, the
OCSET
OUTPUT
VOLTAGE
(1V/DIV.)
3
in Figure 3.
OCSET
, the
SS
)
,