HCS125 Intersil Corporation, HCS125 Datasheet

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HCS125

Manufacturer Part Number
HCS125
Description
Radiation Hardened Quad Buffer/ Three-State
Manufacturer
Intersil Corporation
Datasheet
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii
Description
The Intersil HCS125MS is a Radiation Hardened quad three-state
buffer, each having its own output enable input. A high level on the
enable input puts the output in a high impedance state.
The HCS125MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS125MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCS125DMSR
HCS125KMSR
HCS125D/
Sample
HCS125K/
Sample
HCS125HMSR
(Typ)
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
NUMBER
PART
TEMPERATURE
-55
-55
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
o
o
o
C
C
C
RAD (Si)/s, 20ns Pulse
5 A at VOL, VOH
o
o
C
C
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
SCREENING
12
o
LEVEL
C to +125
RAD (Si)/s
o
-9
C
14 Lead SBDIP
14 Lead Ceramic
Flatpack
14 Lead SBDIP
14 Lead Ceramic
Flatpack
Die
2
/mg
Errors/Bit-Day
PACKAGE
123
Pinouts
Functional Diagram
L = Low, H = High, X = Don’t Care, Z = High Impedance
GND
HCS125MS
OE1
OE2
OEn
A1
A2
Y1
Y2
An
MIL-STD-1835 CDFP3-F14, LEAD FINISH C
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
An
H
L
X
FLATPACK PACKAGE (FLATPACK)
14 LEAD CERAMIC DUAL-IN-LINE
14 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
OE1
OE2
INPUTS
A1
Y1
A2
Y2
Quad Buffer, Three-State
1
2
3
4
5
6
7
TRUTH TABLE
1
2
3
4
5
6
7
TOP VIEW
TOP VIEW
Radiation Hardened
OEn
H
L
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
11
10
9
8
VCC
OE4
A4
Y4
OE3
A3
Y3
OUTPUT
P
n
Yn
H
L
Z
518831
3559.1
VCC
OE4
A4
Y4
OE3
A3
Y3
Yn

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HCS125 Summary of contents

Page 1

... The HCS125MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS125MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART ...

Page 2

... VIL = 1.35V, (Note 3) NOTES: 1. All voltages reference to device GND. 2. Force/Measure functions may be interchanged. 3. For functional tests, VO 4.0V is recognized as a logic “1”, and VO Specifications HCS125MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . ...

Page 3

... PARAMETER SYMBOL Supply Current ICC VCC = 5.5V, VIN = VCC or GND Output Current IOH VCC = VIH = 4.5V, (Source) VOUT = VCC -0.4V, VIL = 0 Output Current (Sink) IOL VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0 Specifications HCS125MS GROUP (NOTES SUB- CONDITIONS GROUPS TEMPERATURE 9 10, 11 +125 9 10, 11 +125 9 10, 11 ...

Page 4

... All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH IOZ Specifications HCS125MS (NOTE 1) CONDITIONS TEMPERATURE 0.5V is recognized as a logic “0”. GROUP B SUBGROUP DELTA LIMIT ...

Page 5

... Each pin except VCC and GND will have a series resistor of 1K OPEN NOTE: Each pin except VCC and GND will have a resistor of 47K Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCS125MS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...

Page 6

... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCS125MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...

Page 7

... Three-State High Timing Diagrams VIH INPUT VS VSS TPZH VOH VT OUTPUT VOZ THREE-STATE HIGH VOLTAGE LEVELS PARAMETER HCS VCC 4.50 VIH 4.50 VS 2.25 VT 2.25 VW 3.60 GND 0 HCS125MS Propagation Delay Load Circuit DUT TPHL TTHL 80% 20% UNITS Three-State High Load Circuit DUT TPHZ VW UNITS 129 ...

Page 8

... Three-State Low Timing Diagrams VIH INPUT VS VSS TPZL VOZ VT OUTPUT VOL THREE-STATE LOW VOLTAGE LEVELS PARAMETER HCS VCC 4.50 VIH 4.50 VS 2.25 VT 2.25 VW 0.90 GND 0 HCS125MS Three-State Low Load Circuit TPLZ VW UNITS 130 VCC RL TEST DUT POINT 50pF RL = 500 Spec Number 518831 ...

Page 9

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com HCS125MS HCS125MS 131 (12) A4 (11) Y4 ...

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