HCS361-IP Microchip Technology, HCS361-IP Datasheet - Page 13
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HCS361-IP
Manufacturer Part Number
HCS361-IP
Description
KEELOQ CODE HOPPING ENCODER
Manufacturer
Microchip Technology
Datasheet
1.HCS361-IP.pdf
(24 pages)
6.0
When using the HCS361 in a system, the user will have
to program some parameters into the device including
the serial number and the secret key before it can be
used. The programming cycle allows the user to input
all 192 bits in a serial data stream, which are then
stored internally in EEPROM. Programming will be
initiated by forcing the PWM line high, after the S3 line
has been held high for the appropriate length of time.
S0 and S1 should be held low during the entire program
cycle (Table 6-1 and Figure 6-1). The device can then
be programmed by clocking in 16 bits at a time, followed
by the word’s complement using S3 or S2 as the clock
line and PWM as the data in line. After each 16-bit word
FIGURE 6-1:
FIGURE 6-2:
TABLE 6-1
V
25 C
(Clock)
S2/S3
(Data)
1996 Microchip Technology Inc.
PWM
DD
Program mode setup time
Note 1: Unused button inputs to be held to ground during the entire programming sequence.
Enter Program
= 5.0V
Programming delay
Data out valid time
Note: If a Verify operation is to be done, then it must immediately follow the Program cycle.
Data setup time
Clock high time
Clock low time
Data hold time
5 C
Hold time 1
PROGRAMMING THE HCS361
Parameter
Mode
2: The V
(Clock)
S2/S3
Programming Cycle
(Data)
PWM
Bit190
10%
End of
Bit191
PROGRAMMING WAVEFORMS
VERIFY WAVEFORMS
PROGRAMMING/VERIFY TIMING REQUIREMENTS
T
DD
2
T
pin must be taken to ground after a program/verify cycle.
1
T
WC
Bit 0
T
CLKL
Begin Verify Cycle Here
Bit 1
T
Bit 2
Symbol
DS
T
T
Bit 0
T
T
T
T
CLKH
CLKL
T
T
WC
DH
Repeat 12 times for each word
DS
DV
T
2
1
Bit 3
DH
Data for Word 0 (KEY_0)
Bit 1 Bit 2
Bit 14 Bit 15
T
Preliminary
DV
T
CLKH
Bit 3
Bit 0
Data in Word 0
Min.
9.0
25
25
18
—
—
0
0
is loaded, a programming delay is required for the
internal program cycle to complete. An acknowledge bit
can be read back after the programming delay (T
After the first word and its complement have been
downloaded, an automatic bulk write is performed. This
delay can take up to Twc. At the end of the program-
ming cycle, the device can be verified (Figure 6-2) by
reading back the EEPROM. Reading is done by clock-
ing the S3 line and reading the data bits on PWM. For
security reasons, it is not possible to execute a verify
function without first programming the EEPROM. A
verify operation can only be done once, immedi-
ately following the program cycle.
Bit 1 Bit 2
Bit 14
Bit 3
Bit 15
Bit 14 Bit 15
Max.
4.9
—
30
—
—
—
—
24
Bit 16 Bit 17
T
WC
HCS361
Bit 16 Bit 17
DS40146C-page 13
Data for Word 1
Acknowledge
Bit190 Bit191
Units
ms
ms
ms
s
s
s
s
s
WC
).