HCS361-IP Microchip Technology, HCS361-IP Datasheet - Page 9

• Manufacturer Part Number: HCS361-IP
• Description: KEELOQ CODE HOPPING ENCODER
• Manufacturer: Microchip Technology

TABLE 3-7
3.5.12
VPWM selects between VPWM modulation and PWM
modulation. If VPWM = 1, VPWM modulation is
selected as well as the following:
1.
2.
If VPWM = 0, PWM modulation is selected.
3.5.13
The overflow bit is used to extend the number of possi-
ble synchronization values. The synchronization
counter is 16 bits in length, yielding 65,536 values
before the cycle repeats. Under typical use of
10 operations a day, this will provide nearly 18 years of
use before a repeated value will be used. Should the
system designer conclude that is not adequate, then
the overflow bit can be utilized to extend the number of
unique values. This can be done by programming OVR
to 1 at the time of production. The encoder will automat-
ically clear OVR the first time that the transmitted syn-
chronization value wraps from 0xFFFF to 0x0000.
Once cleared, OVR cannot be set again, thereby creat-
ing a permanent record of the counter overflow. This
prevents fast cycling of 64K counter. If the decoder sys-
tem is programmed to track the overflow bits, then the
effective number of unique synchronization values can
be extended to 128K. If programmed to zero, the sys-
tem will be compatible with the NTQ104/5/6 devices
(i.e., no overflow with discrimination bits set to zero).
1996 Microchip Technology Inc.
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
Enables the TXWAK bit to select the WAKEUP
transmission.
Extends the Guard Time.
VPWM: VARIABLE PULSE WIDTH
MODULATION
OVR: OVERFLOW
S3
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
FUNCTION CODES
S2
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
S1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Preliminary
IND = 0
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Counter
B IR mode
B IR mode
B IR mode
B IR mode
IND = 1
A
A
A
A
A
A
A
B
B
B
B
If SEED = 1, transmit seed immediately.
If SEED = 1, transmit seed after delay.
Comments
HCS361
DS40146C-page 9