ATTINY12 ATMEL Corporation, ATTINY12 Datasheet - Page 21

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ATTINY12

Manufacturer Part Number
ATTINY12
Description
8-bit AVR Microcontroller with 1K Byte Flash
Manufacturer
ATMEL Corporation
Datasheet

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Power-on Reset for the
ATtiny12
External Reset
1006D–AVR–07/03
A Power-on Reset (POR) pulse is generated by an on-chip detection circuit. The detec-
tion level is nominally 1.4V. The POR is activated whenever V
level. The POR circuit can be used to trigger the start-up reset, as well as detect a fail-
ure in supply voltage.
The Power-on Reset (POR) circuit ensures that the device is reset from power-on.
Reaching the Power-on Reset threshold voltage invokes a delay counter, which deter-
mines the delay for which the device is kept in Reset after V
of the delay counter can be defined by the user through the CKSEL fuses. The different
selections for the delay period are presented in Table 9. The Reset signal is activated
again, without any delay, when the V
If the built-in start-up delay is sufficient, RESET can be connected to V
an external pull-up resistor. See Figure 18. By holding the RESET pin low for a period
after V
ure 19 for a timing example on this.
Figure 18. MCU Start-up, RESET Tied to V
Figure 19. MCU Start-up, RESET Extended Externally
An external reset is generated by a low level on the RESET pin. Reset pulses longer
than 50 ns will generate a reset, even if the clock is not running. Shorter pulses are not
guaranteed to generate a reset. When the applied signal reaches the Reset Threshold
Voltage – V
period (t
INTERNAL
TIME-OUT
INTERNAL
TIME-OUT
RESET
RESET
RESET
RESET
V
V
CC
CC
CC
TOUT
has been applied, the Power-on Reset period can be extended. Refer to Fig-
RST
) has expired.
– on its positive edge, the delay timer starts the MCU after the Time-out
V
V
V
POT
POT
RST
t
TOUT
CC
decreases below detection level.
V
RST
CC
.
t
TOUT
CC
CC
rise. The time-out period
ATtiny11/12
is below the detection
CC
directly or via
21

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