ATTINY12 ATMEL Corporation, ATTINY12 Datasheet - Page 42

• Manufacturer Part Number: ATTINY12
• Description: 8-bit AVR Microcontroller with 1K Byte Flash
• Manufacturer: ATMEL Corporation

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ATtiny11/12
ing the corresponding interrupt handling vector. Alternatively, ACI is cleared by writing a
logic one to the flag.
• Bit 3 - ACIE: Analog Comparator Interrupt Enable
When the ACIE bit is set (one) and the I-bit in the Status Register is set (one), the Ana-
log Comparator Interrupt is activated. When cleared (zero), the interrupt is disabled.
• Bit 2 - Res: Reserved Bit
This bit is a reserved bit in the ATtiny11/12 and will always read as zero.
• Bits 1,0 - ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator Inter-
rupt. The different settings are shown in Table 18.
Table 18. ACIS1/ACIS0 Settings
Note:
Caution: Using the SBI or CBI instruction on bits other than ACI in this register will write
a one back into ACI if it is read as set, thus clearing the flag.
ACIS1
0
0
1
1
When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be dis-
abled by clearing its interrupt enable bit in the ACSR register. Otherwise, an interrupt can
occur when the bits are changed.
ACIS0
0
1
0
1
Interrupt Mode
Comparator Interrupt on Output Toggle
Reserved
Comparator Interrupt on Falling Output Edge
Comparator Interrupt on Rising Output Edge
1006D–AVR–07/03