P89LV51RD2 Philips Semiconductors, P89LV51RD2 Datasheet - Page 65

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P89LV51RD2

Manufacturer Part Number
P89LV51RD2
Description
8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
Philips Semiconductors
Datasheet

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9397 750 14101
Product data
Fig 29. I
Capacitive loading on Ports 0 and 2 may cause spurious noise to be superimposed on the V
due to external bus capacitance discharging into the Port 0 and 2 pins when the pins make 1-to-0 transitions during bus operations. In
the worst cases (capacitive loading > 100 pF), the noise pulse on the ALE pin may exceed 0.8 V. In such cases, it may be desirable to
qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
Load capacitance for Port 0, ALE and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
Capacitive loading on Ports 0 and 2 may cause the V
the address bits are stabilizing.
Pins of Ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when V
Pin capacitance is characterized but not tested. EA = 25 pF (max).
DD
vs. frequency.
IN
is approximately 2 V.
30
25
20
15
10
5
0
5
10
Internal Clock Frequency (MHz)
Rev. 03 — 11 October 2004
OH
on ALE and PSEN to momentarily fall below the V
15
Maximum Active I DD
20
Typical Active I DD
25
Typical Idle I DD
Maximum Idle I DD
8-bit microcontrollers with 80C51 core
30
OL
s of ALE and Ports 1 and 3. The noise
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
002aaa547
35
P89LV51RD2
DD
0.7 specification when
65 of 77

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