Z8F160x Zilog, Z8F160x Datasheet - Page 124

• Manufacturer Part Number: Z8F160x
• Description: Z8 Encore / Microcontrollers with Flash Memory and 10 Bit A/D Converter
• Manufacturer: Zilog

Table 60. SPI Data Register (SPIDATA)
SPI Control Register Definitions
PS017610-0404
RESET
FIELD
ADDR
BITS
R/W
SPI Data Register
R/W
X
7
1. Disable the SPI by clearing the SPIEN bit in the SPI Control register to 0.
2. Load the desired 16-bit count value into the SPI Baud Rate High and Low Byte
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
The SPI Data register stores both the outgoing (transmit) data and the incoming (received)
data. Reads from the SPI Data register always return the current contents of the 8-bit shift
register.
With the SPI configured as a Master, writing a data byte to this register initiates the data
transmission. With the SPI configured as a Slave, writing a data byte to this register loads
the shift register in preparation for the next data transfer with the external Master. In either
the Master or Slave modes, if a transmission is already in progress, writes to this register
are ignored and the Overrun error flag, OVR, is set in the SPI Status register.
When the character length is less than 8 bits (as set by the NUMBITS field in the SPI Mode
register), the transmit character must be left justified in the SPI Data register. A received
character of less than 8 bits will be right justified. For example, if the SPI is configured for
4-bit characters, the transmit characters must be written to SPIDATA[7:4] and the received
characters are read from SPIDATA[3:0].
DATA—Data
Transmit and/or receive data.
registers.
BIRQ bit in the SPI Control register to 1.
R/W
X
6
R/W
X
5
R/W
X
4
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
DATA
F60H
R/W
X
3
R/W
X
2
Serial Peripheral Interface
R/W
X
1
Z8 Encore!
R/W
X
0
®
106