Z8F160x Zilog, Z8F160x Datasheet - Page 194
Z8F160x
Manufacturer Part Number
Z8F160x
Description
Z8 Encore / Microcontrollers with Flash Memory and 10 Bit A/D Converter
Manufacturer
Zilog
Datasheet
1.Z8F160X.pdf
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PS017610-0404
General Purpose I/O Port Input Data Sample Timing
Port Input Data
Register Latch
Figure 93 illustrates timing of the GPIO Port input sampling. The input value on a GPIO
Port pin is sampled on the rising edge of the system clock. The Port value is then available
to the eZ8 CPU on the second rising clock edge following the change of the Port value.
Figure 93. Port Input Sample Timing
Table 107. GPIO Port Input Timing
Parameter
T
T
T
Input Value
S_PORT
H_PORT
SMR
Port Pin
System
Clock
Abbreviation
Port Input Transition to XIN Rise Setup Time
(Not pictured)
XIN Rise to Port Input Transition Hold Time
(Not pictured)
GPIO Port Pin Pulse Width to Insure Stop Mode Recovery
(for GPIO Port Pins enabled as SMR sources)
0 Value May Be Read
TCLK
From Port Input
Data Register
Changes to 0
Port Value
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Electrical Characteristics
Minimum Maximum
1µs
5
5
Delay (ns)
Z8 Encore!
–
–
®
176
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