MC9S12A256 Motorola, MC9S12A256 Datasheet - Page 21
MC9S12A256
Manufacturer Part Number
MC9S12A256
Description
MC9S12DT256 Device User Guide V03.03
Manufacturer
Motorola
Datasheet
1.MC9S12A256.pdf
(130 pages)
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Section 1 IntroductionMC9S12DT256
1.1 Overview
The MC9S12DT256 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 12K
bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), three
serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit
analog-to-digital converters (ADC), an 8-channel pulse-width modulator (PWM), a digital Byte Data Link
Controller (BDLC), 29 discrete digital I/O channels (Port A, Port B, Port K and Port E), 20 discrete digital
I/O lines with interrupt and wakeup capability, three CAN 2.0 A, B software compatible modules
(MSCAN12), and an Inter-IC Bus. The MC9S12DT256 has full 16-bit data paths throughout. However,
the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for
lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be
adjusted to suit operational requirements.
1.2 Features
•
•
•
HCS12 Core
– 16-bit HCS12 CPU
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
– BDM (Background Debug Mode)
CRG
– Low current Colpitts or Pierce oscillator
– PLL
– COP watchdog
– Real time interrupt
– Clock Monitor
8-bit and 4-bit ports with interrupt functionality
– Digital filtering
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii. Instruction queue
iv. Enhanced indexed addressing
MC9S12DT256 Device User Guide — V03.03
19