M306V2 Mitsubishi, M306V2 Datasheet - Page 57

• Manufacturer Part Number: M306V2
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

Rev. 1.0
Figure 2.7.4 Interrupt response time
2.7.10 Interrupt Sequence
2.7.11 Interrupt Response Time
An interrupt sequence — what are performed over a period from the instant an interrupt is accepted to the
instant the interrupt routine is executed — is described here.
If an interrupt occurs during execution of an instruction, the processor determines its priority when the
execution of the instruction is completed, and transfers control to the interrupt sequence from the next
cycle. If an interrupt occurs during execution of either the SMOVB, SMOVF, SSTR or RMPA instruction,
the processor temporarily suspends the instruction being executed, and transfers control to the interrupt
sequence.
In the interrupt sequence, the processor carries out the following in sequence given:
(1) CPU gets the interrupt information (the interrupt number and interrupt request level) by reading ad-
(2) Saves the content of the flag register (FLG) as it was immediately before the start of interrupt se-
(3) Sets the interrupt enable flag (I flag), the debug flag (D flag), and the stack pointer select flag (U flag)
(4) Saves the content of the temporary register (Note 1) within the CPU in the stack area.
(5) Saves the content of the program counter (PC) in the stack area.
(6) Sets the interrupt priority level of the accepted instruction in the IPL.
After the interrupt sequence is completed, the processor resumes executing instructions from the first
address of the interrupt routine.
'Interrupt response time' is the period between the instant an interrupt occurs and the instant the first
instruction within the interrupt routine has been executed. This time comprises the period from the
occurrence of an interrupt to the completion of the instruction under execution at that moment (a) and the
time required for executing the interrupt sequence (b). Figure 2.7.4 shows the interrupt response time.
Note: This register cannot be utilized by the user.
dress 00000
quence in the temporary register (Note) within the CPU.
to “0” (the U flag, however does not change if the INT instruction, in software interrupt numbers 32
through 63, is executed)
Interrupt request generated
16
.
Instruction
(a)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
Interrupt response time
Interrupt request acknowledged
Interrupt sequence
(b)
interrupt routine
and ON-SCREEN DISPLAY CONTROLLER
Instruction in
MITSUBISHI MICROCOMPUTERS
M306V2ME-XXXFP
M306V2EEFP
Time
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