HN58X25128I Renesas Technology, HN58X25128I Datasheet - Page 20

• Manufacturer Part Number: HN58X25128I
• Description: (HN58X25128I / HN58X25256I) EEPROM
• Manufacturer: Renesas Technology

HN58X25128I/HN58X25256I
Write Status Register (WRSR) Sequence
Read from Memory Array (READ):
As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The
bits of the instruction byte and the address bytes are then shifted in, on serial data input (D). The addresses
are loaded into an internal address register, and the byte of data at that address is shifted out, on serial data
output (Q).
If chip select (S) continues to be driven low, the internal address register is automatically incremented, and
the byte of data at the new address is shifted out.
When the highest address is reached, the address counter rolls over to zero, allowing the Read cycle to be
continued indefinitely. The whole memory can, therefore, be read with a single READ instruction.
The Read cycle is terminated by driving chip select (S) high. The rising edge of the chip select (S) signal can
occur at any time during the cycle. The addressed first byte can be any byte within any page. The instruction
is not accepted, and is not executed, if a Write cycle is currently in progress.
Rev.0.0, Nov. 2002, page 18 of 27
9
Q
C
D
5
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
0
1
2
3
4
5
6
7
High-Z
MSB
8
7
9 10 11 12 13 14 15
6
Status Register In
5
4
3
2
1
0