A29L800 AMIC Technology, A29L800 Datasheet - Page 19

• Manufacturer Part Number: A29L800
• Description: 1M X 8 Bit / 512K X 16 Bit CMOS 3.0 Volt-only/ Boot Sector Flash Memory
• Manufacturer: AMIC Technology

PRELIMINARY
RY/
The RY/
indicates whether an Embedded algorithm is in progress or
complete. The RY/
the final
RY/
tied together in parallel with a pull-up resistor to VCC. (The
RY/
If the output is low (Busy), the device is actively erasing or
programming. (This includes programming in the Erase
Suspend mode.) If the output is high (Ready), the device is
ready to read array data (including during the Erase
Suspend mode), or is in the standby mode.
Table 6 shows the outputs for RY/
Timings”, “Timing Waveforms for Program Operation” and
“Timing Waveforms for Chip/Sector Erase Operation” for
more information.
I/O
Toggle Bit I on I/O
Program or Erase algorithm is in progress or complete, or
whether the device has entered the Erase Suspend mode.
Toggle Bit I may be read at any address, and is valid after
the rising edge of the final
sequence (prior to the program or erase operation), and
during the sector erase time-out.
During an Embedded Program or Erase algorithm operation,
successive read cycles to any address cause I/O
(The system may use either
cycles.) When the operation is complete, I/O
After an erase command sequence is written, if all sectors
selected for erasing are protected, I/O
approximately 100 s, then returns to reading array data. If
not all selected sectors are protected, the Embedded Erase
algorithm erases the unprotected sectors, and ignores the
selected sectors that are protected.
The system can use I/O
whether a sector is actively erasing or is erase-suspended.
When the device is actively erasing (that is, the Embedded
Erase algorithm is in progress), I/O
device enters the Erase Suspend mode, I/O
However, the system must also use I/O
sectors are erasing or erase-suspended. Alternatively, the
system can use I/O
Polling").
If a program address falls within a protected sector, I/O
toggles for approximately 2 s after the program command
sequence is written, then returns to reading array data.
I/O
and stops toggling once the Embedded Program algorithm
is complete.
The Write Operation Status table shows the outputs for
Toggle Bit I on I/O
algorithm, and to the Toggle Bit Timings figure in the "AC
Characteristics" section for the timing diagram. The I/O
I/O
graphical form. See also the subsection on " I/O
II".
6
6
6
BY : Read/ Busy
BY
BY
: Toggle Bit I
also toggles during the erase-suspend-program mode,
figure shows the differences between I/O
pin is not available on the 44-pin SOP package)
is an open-drain output, several RY/
BY
WE
is a dedicated, open-drain output pin that
pulse in the command sequence. Since
(September, 2002, Version 0.2)
BY
7
6
. Refer to Figure 6 for the toggle bit
(see the subsection on " I/O
6
status is valid after the rising edge of
indicates whether an Embedded
6
and I/O
OE
WE
or
2
pulse in the command
BY
CE
together to determine
6
2
. Refer to “
toggles. When the
to determine which
to control the read
6
6
BY
6
stops toggling.
stops toggling.
2
2
toggles for
pins can be
: Toggle Bit
and I/O
6
to toggle.
RESET
7
:
Data
2
6
vs.
in
6
19
I/O
The "Toggle Bit II" on I/O
whether a particular sector is actively erasing (that is, the
Embedded Erase algorithm is in progress), or whether that
sector is erase-suspended. Toggle Bit II is valid after the
rising edge of the final
sequence.
I/O
those sectors that have been selected for erasure. (The
system may use either
cycles.) But I/O
actively erasing or is erase-suspended. I/O
indicates whether the device is actively erasing, or is in
Erase Suspend, but cannot distinguish which sectors are
selected for erasure. Thus, both status bits are required for
sector and mode information. Refer to Table 6 to compare
outputs for I/O
Figure 6 shows the toggle bit algorithm in flowchart form,
and the section " I/O
See also the " I/O
Toggle Bit Timings figure for the toggle bit timing diagram.
The I/O
and I/O
Reading Toggle Bits I/O
Refer to Figure 6 for the following discussion. Whenever the
system initially begins reading toggle bit status, it must read
I/O
toggle bit is toggling. Typically, a system would note and
store the value of the toggle bit after the first read. After the
second read, the system would compare the new value of
the toggle bit with the first. If the toggle bit is not toggling,
the device has completed the program or erase operation.
The system can read array data on I/O
following read cycle.
However, if after the initial two read cycles, the system
determines that the toggle bit is still toggling, the system
also should note whether the value of I/O
section on I/O
again whether the toggle bit is toggling, since the toggle bit
may have stopped toggling just as I/O
toggle bit is no longer toggling, the device has successfully
completed the program or erase operation. If it is still
toggling, the device did not complete the operation
successfully, and the system must write the reset command
to return to reading array data.
The remaining scenario is that the system initially
determines that the toggle bit is toggling and I/O
gone high. The system may continue to monitor the toggle
bit and I/O
status as described in the previous paragraph. Alternatively,
it may choose to perform other system tasks. In this case,
the system must start at the beginning of the algorithm when
it returns to determine the status of the operation (top of
Figure 6).
2
7
2
: Toggle Bit II
- I/O
toggles when the system reads at addresses within
6
2
in graphical form.
vs. I/O
0
5
at least twice in a row to determine whether a
through successive read cycles, determining the
2
5
). If it is, the system should then determine
and I/O
6
2
figure shows the differences between I/O
cannot distinguish whether the sector is
6
: Toggle Bit I" subsection. Refer to the
2
: Toggle Bit II" explains the algorithm.
6
.
AMIC Technology, Inc.
OE
2
, when used with I/O
6
WE
, I/O
A29L800 Series
or
2
pulse in the command
CE
to control the read
5
5
6
went high. If the
, by comparison,
7
is high (see the
- I/O
6
, indicates
5
0
has not
on the
2