BS62LV8003 Brilliance Semiconductor, BS62LV8003 Datasheet

BS62LV8003

Manufacturer Part Number

BS62LV8003

Description

Very Low Power/Voltage CMOS SRAM 1M X 8 bit

Manufacturer

Brilliance Semiconductor

Datasheet

1.BS62LV8003.pdf (10 pages)

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R0201-BS62LV8003

• Wide Vcc operation voltage : 2.4V ~ 3.6V

• Very low power consumption :

• High speed access time :

• Automatic power down when chip is deselected

• Three state outputs and TTL compatible

• Fully static operation

• Data retention supply voltage as low as 1.5V

• Easy expansion with CE1, CE2 and OE options

BS62LV8003EC

BS62LV8003BC

BS62LV8003EI

BS62LV8003BI

PIN CONFIGURATIONS

PRODUCT FAMILY

Brilliance Semiconductor Inc

FEATURES

GND

DQ0

DQ1

VCC

DQ2

DQ3

CE1

Vcc = 3V

-70

-10

A19

A18

A17

A16

A15

PRODUCT

48-Ball CSP top View

FAMILY

VCC

VSS

A18

BSI

100ns (Max) at Vcc = 3V

70ns (Max) at Vcc = 3V

BS62LV8003EC

BS62LV8003EI

C-grade: 20mA (Max.) operating current

I -grade: 25mA (Max.) operating current

0.5uA (Typ.) CMOS standby current

VCC

A17

A14

A12

-40

TEMPERATURE

A16

A15

A13

A10

OPERATING

C to +70

C to +85

Very Low Power/Voltage CMOS SRAM

1M X 8 bit

A11

CE1

CE2

VCC

VSS

A19

CE2

DQ7

DQ6

GND

VCC

DQ5

DQ4

A10

A11

A12

A13

A14

. reserves the right to modify document contents without notice.

2.4V ~ 3.6V

RANGE

Vcc

70 / 100

SPEED

Vcc=3V

( ns )

The BS62LV8003 is a high performance, very low power CMOS

Static Random Access Memory organized as 1,048,576 words by 8 bits

and operates from a wide range of 2.4V to 3.6V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with a typical CMOS standby current of

0.5uA and maximum access time of 70ns in 3V operation.

Easy memory expansion is provided by an active LOW chip

enable (CE1), an active HIGH chip enable(CE2) and active LOW output

enable (OE) and three-state output drivers.

The BS62LV8003 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS62LV8003 is available in 44 pin TSOP2 and 48-pin BGA type.

FUNCTIONAL BLOCK DIAGRAM

A13

A17

A15

A18

A16

A14

A12

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

GENERAL DESCRIPTION

CE1

Vdd

Gnd

CE2

Address

Buffer

Input

( I

STANDBY

CCSB1

Control

Vcc=3V

POWER DISSIPATION

3uA

6uA

, Max )

Output

Buffer

Data

Input

Data

Decoder

Row

Operating

( I

2048

Vcc=3V

20mA

25mA

A11A9 A8 A3 A2 A1 A0A10 A19

, Max )

BS62LV8003

Address Input Buffer

Column Decoder

Memory Array

2048 X 4096

Write Driver

Sense Amp

Column I/O

4096

512

TSOP2-44

BGA-48-0810

TSOP2-44

BGA-48-0810

PKG TYPE

Revision 2.4

April 2002

Related parts for BS62LV8003

BS62LV8003 Summary of contents

Page 1

... HIGH chip enable(CE2) and active LOW output enable (OE) and three-state output drivers. The BS62LV8003 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV8003 is available in 44 pin TSOP2 and 48-pin BGA type. SPEED Vcc ( ns ) ...

Page 2

... X (1) OPERATING RANGE RATING UNITS -0 Vcc+0.5 O -40 to +125 C O -60 to +150 C 1.0 W CAPACITANCE 20 mA SYMBOL 1. This parameter is guaranteed and not tested. 2 BS62LV8003 Function I/O OPERATION Vcc CURRENT High Z High Z D OUT D IN AMBIENT RANGE TEMPERATURE Commercial + Industrial - +85 ...

Page 3

... Vcc - 0. See Retention Waveform ( CE1 Controlled ) Data Retention Mode ≥ V 1.5V DR Vcc t CDR ≥ CE1 Vcc - 0. CE2 Controlled ) Data Retention Mode V 1.5V DR Vcc t CDR CE2 0. BS62LV8003 MIN. TYP. MAX. (1) -0.5 -- 0.8 Vcc=3V Vcc=3V 2.0 -- Vcc+0 0.4 Vcc=3V 2.4 -- Vcc= Vcc= Vcc= ...

Page 4

... Output Disable to Output Address Change 4 BS62LV8003 KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS MUST BE STEADY MAY CHANGE FROM MAY CHANGE FROM DON T CAR E: ANY CHANG E PERMITTED DOES NOT APPLY Vcc = 3V ) BS62LV8003-70 BS62LV8003-10 MIN. TYP. MAX. MIN. TYP. MAX 100 -- -- ...

Page 5

... The parameter is guaranteed but not 100% tested. R0201-BS62LV8003 ) ACS2 t ACS1 (5) t CLZ ACS2 t OLZ t ACS1 (5) t CLZ . and CE2 = 5pF as shown in Figure 1B BS62LV8003 t OH (5) t CHZ (5) OHZ (1,5) t CHZ Revision 2.4 April 2002 ...

Page 6

... Data to Write Time Overlap Data Hold from Write Time Output Disable to Output in High Z End of Write to Output Active t WC (5) (11 ( (4,10) t OHZ 6 BS62LV8003 Vcc = 3.0V ) BS62LV8003-70 BS62LV8003-10 MIN. TYP. MAX. MIN. TYP. MAX 100 -- 100 -- 100 -- 35 -- ...

Page 7

... CE2 going high or CE1 going low to the end of write. CW R0201-BS62LV8003 ( (4,10) t WHZ ). IL ± 500mV from steady state with BS62LV8003 (11 ( (8, 5pF as shown in Figure 1B. (8) Revision 2.4 April 2002 ...

Page 8

... BSI ORDERING INFORMATION BS62LV8003 PACKAGE DIMENSIONS TSOP2-44 R0201-BS62LV8003 BS62LV8003 SPEED 70: 70ns 10: 100ns GRADE + - + PACKAGE E: TSOP2-44 B: BGA-48-0810 Revision 2.4 April 2002 ...

Page 9

... BSI PACKAGE DIMENSIONS (continued) SIDE VIEW D 0.1 D1 VIEW A 48 mini-BGA (8 x 10mm) R0201-BS62LV8003 NOTES: 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS 10.0 8.0 9 BS62LV8003 5.25 3.75 0.75 SOLDER BALL 0.35 0.05 Revision 2.4 April 2002 ...

Page 10

... BSI REVISION HISTORY Revision Description 2.2 2001 Data Sheet release 2.3 Modify Standby Current (Typ. and Max.) 2.4 Modify some AC parameters R0201-BS62LV8003 Date Apr. 15, 2001 Jun. 29, 2001 April,11,2002 10 BS62LV8003 Note Revision 2.4 April 2002 ...

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