HIP0050IB Intersil Corporation, HIP0050IB Datasheet - Page 5

• Manufacturer Part Number: HIP0050IB
• Description: 0.3A/50V Octal Low Side Power Driver with Serial Bus Control and Over-Current Fault Flag
• Manufacturer: Intersil Corporation

Pin Descriptions
V
The V
the IC. The normal operating voltage range is 4.5V to 5.5V.
When switched on, the POR forces all outputs off.
SCK Serial Clock Pin
SCK is the clock input for the SPI Interface. Output ON/OFF
control data is clocked into an eight stage shift register on
the rising edge of an external clock. This input has a Schmitt
trigger.
SI Serial Data In Pin
SI is the Serial Data Input Pin for the SPI Interface. The eight
power outputs are controlled by the serial data via the output
data buffer. This input has a Schmitt Trigger.
STR Strobe Pin for the SPI Interface
When the STR Pin is high, data from the 8-bit shift register is
passed into the output data buffers where it controls the ON-
OFF state of each output driver. The data is latched in the
output data buffers when STR goes low. This input has a
Schmitt trigger.
SO Serial Data Out Pin
The serial data out allows other ICs to be serially cascaded.
For example, a 10-bit LED driver may be located behind the
HIP0050. A controlling microprocessor may then clock out
18-bits of information and simultaneously strobe both parts.
The cascaded ICs may be the same or different from the
HIP0050.
CC
FIGURE 2. MAXIMUM SINGLE PULSE ENERGY SAFE OPERATING AREA FOR EACH CLAMPED OUTPUT DRIVER, T
Power Pin
CC
pin is the positive 5V logic voltage supply input for
1000
100
10
1
0.1
1
HIP0050
SAFE OPERATING AREA
BELOW LINE
TIME (ms)
5
DR0 - DR7 Outputs 0 Thru 7
The drain output pins of the DMOS Power Drivers are capa-
ble of sinking 300mA. Each output has short circuit protection
to independently shutdown the output under excessive high
load current conditions.
FLT Fault Flag
The fault flag pin indicates an over-current in any one of the
output drivers. (It is not an indicator for the thermal shutdown
mode.) The FLT output is active low and can sink 1.6mA
when activated. When latched low, it will remain latched until
the next data strobe.
EN Enable Pin
The enable pin is an active low enable function for all eight
output drivers. When EN is high, drive from the output data
buffer is held low and all output drivers are disabled. When
EN is low, the output drivers are enabled and data in the 8-bit
shift register is transparent to the output data buffer. This input
has a Schmitt trigger.
LGND and GND Pins
The LGND Pin is the 5V Logic Supply Ground for the IC and
GND is a common ground for the power output drivers.
10
100
A
= 25
o
C