HYS64V2100G Siemens, HYS64V2100G Datasheet - Page 7
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HYS64V2100G
Manufacturer Part Number
HYS64V2100G
Description
3.3V 2M x 64-Bit SDRAM Module 3.3V 2M x 72-Bit SDRAM Module
Manufacturer
Siemens
Datasheet
1.HYS64V2100G.pdf
(12 pages)
AC Characteristics 3)4)
T
Semiconductor Group
A
= 0 to 70 C;
Parameter
Clock and Clock Enable
Clock Cycle Time
System Frequency
Clock Access Time
Clock High Pulse Width
Clock Low Pulse Width
CKE Setup Time
CKE Hold Time
CKE Setup Time (Power down mode)
CKE Setup Time (Self Refresh Exit)
Transition time (rise and fall)
Common Parameters
Command Setup time
Command Hold Time
Address Setup Time
Address Hold Time
RAS to CAS delay
Cycle Time
Active Command Period
Precharge Time
V
SS
= 0 V;
V
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
CAS Latency = 3
CAS Latency = 2
CAS Latency = 1
CC
= 3.3 V
0.3 V,
Symbol
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CK
AC
CH
CL
CKS
CKH
CKSP
CKSR
T
CS
CH
AS
AH
RCD
RC
RAS
RP
T
7
= 1 ns
min
3.5
3.5
10
15
30
30
75
45
30
Limit Values
–
–
–
–
–
–
3
1
3
8
1
3
1
3
1
2M x 64/72 SDRAM-Module
HYS64(72)V2100G(C)U-10
-10
max
120k
120k
100
66
33
27
30
8
9
–
–
–
–
–
–
–
–
–
–
–
–
Unit
ns
ns
ns
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
5
6
6
6
8
6
6
6
6