CDP1881C Intersil Corporation, CDP1881C Datasheet - Page 4

• Manufacturer Part Number: CDP1881C
• Description: CMOS 6-Bit Latch and Decoder Memory Interfaces
• Manufacturer: Intersil Corporation

NOTE:
Dynamic Electrical Specifications
Minimum Setup Time
Memory Address to CLOCK
Minimum Hold Time
Memory Address After CLOCK
Minimum CLOCK Pulse Width
1. CDP1881C Only
(NOTE 1)
MWR
X
X
X
X
X
X
1
0
0
0
0
0
(NOTE 1)
PARAMETER
MRD
Logic 1 = High, Logic 0 = Low, X = Don’t Care
X
X
X
X
X
X
1
0
0
0
0
0
CE
X
X
X
CE
X
1
0
0
0
0
0
0
0
0
0
0
INPUTS
t
t
CDP1881C, CDP1882, CDP1882C
t
MACL
CLMA
CLCL
at T
(See Figure 1)
CLK
X
X
A
1
1
1
1
0
1
1
1
1
0
= -40
INPUTS
CLK
V
(V)
10
10
10
1
1
0
5
5
5
DD
o
C to +85
TRUTH TABLE
MA4
X
X
X
X
0
1
0
1
0
1
0
1
MIN
-
-
-
-
-
-
o
4-4
C, V
MA0, MA1, MA2, MA3
DD
(NOTE 1)
CDP1882
TYP
MA5
10
50
25
8
8
8
X
X
X
X
5%, t
0
0
1
1
0
0
1
1
X
1
0
R
, t
(NOTE 2)
F
MAX
= 20ns, V
35
25
25
25
75
40
CS0
1
1
0
1
1
1
0
1
1
1
IH
A8, A9, A10, A11
MIN
= 0.7 V
Previous State
-
-
-
-
-
-
CDP1881C, CDP1882C
OUTPUTS
CS1
1
1
1
0
1
1
Previous State
1
0
1
1
Previous State
1
0
(NOTE 1)
OUTPUTS
DD
TYP
, V
10
50
8
-
-
-
IL
= 0.3 V
CS2
1
1
1
1
0
1
1
1
0
1
(NOTE 2)
MAX
DD
35
25
75
-
-
-
, C
L
= 100pF,
CS3
UNITS
1
1
1
1
1
0
1
1
1
0
ns
ns
ns
ns
ns
ns