K7R161884B-FC25 Samsung semiconductor, K7R161884B-FC25 Datasheet
K7R161884B-FC25
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K7R161884B-FC25 Summary of contents
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... K7R163684B K7R161884B Document Title 512Kx36-bit,1Mx18-bit QDR Revision History Rev. No. History 0.0 1. Initial document. 0.1 1. Change the Boundary scan exit order. 2. Correct the Overshoot and Undershoot timing diagram. 0.2 1. Change JTAG Block diagram 0.3 1. Add the speed bin (-25) 0.4 1. Correct the JTAG ID register definition 2. Correct the AC timing parameter (delete the tKHKH Max value) ...
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... MEMORY ARRAY SELECT OUTPUT CONTROL - SRAM Part Cycle Access Number Time Time K7R163684B-FC30 3.3 0.45 K7R163684B-FC25 4.0 0.45 K7R163684B-FC20 5.0 0.45 K7R163684B-FC16 6.0 0.50 K7R161884B-FC30 3.3 0.45 K7R161884B-FC25 4.0 0.45 K7R161884B-FC20 5.0 0.45 K7R161884B-FC16 6.0 0.50 72 144 (or 36) 36 (or 18) (or 72) Q(Data Out) 72 CQ, CQ (or 36) (Echo Clock out) Unit July. 2004 ...
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... K7R163684B K7R161884B PIN CONFIGURATIONS (TOP VIEW /SA* NC/SA Q27 Q18 D18 C D27 Q28 D19 D D28 D20 Q19 E Q29 D29 Q20 F Q30 Q21 D21 G D30 D22 Q22 H Doff V V REF DDQ J D31 Q31 D23 K Q32 D32 Q23 L Q33 Q24 D24 ...
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... K7R163684B K7R161884B PIN CONFIGURATIONS (TOP VIEW) K7R161884B(1Mx18 /SA D10 D NC D11 Q10 Q11 F NC Q12 D12 G NC D13 Q13 H Doff V V REF DDQ D14 Q14 L NC Q15 D15 D16 N NC ...
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... The K7R163684B and K7R161884B are 18,874,368-bits QDR(Quad Data Rate) Synchronous Pipelined Burst SRAMs. They are organized as 524,288 words by 36bits for K7R163684B and 1,048,576 words by 18 bits for K7R161884B. The QDR operation is possible by supporting DDR read and write operations through separate data output and input ports with the same cycle ...
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... And "late writed" data is presented to the device on every rising edge of both K and K clocks. The device disregards input data presented on the same cycle W disabled. When the W is disabled after a read operation, the K7R163684B and K7R161884B will first complete burst read operation before entering into deselect mode at the next K clock rising edge. ...
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... K7R163684B K7R161884B READ NOP READ LOAD NEW D count=2 READ ADDRESS D count=0 ALWAYS DDR READ D count=D count+1 READ D count=1 INCREMENT READ ADDRESS Notes: 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1. 2. "READ" refers to read active status with R=Low, "READ" refers to read inactive status with R=high. "WRITE" and "WRITE" are the same case. ...
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... K7R163684B K7R161884B TRUTH TABLES SYNCHRONOUS TRUTH TABLE D(A1) Previous Stopped X X state ↑ ↑ Din 5 4 ↑ K(t+1) Notes means "Don′t Care". 2. The rising edge of clock is symbolized by ( ↑ Before enter into clock stop status, all pending read and write operations will be completed. ...
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... K7R163684B K7R161884B ABSOLUTE MAXIMUM RATINGS* PARAMETER Voltage on V Supply Relative Voltage on V Supply Relative to V DDQ Voltage on Input Pin Relative Storage Temperature Operating Temperature Storage Temperature Range Under Bias *Note: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...
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... K7R163684B K7R161884B AC ELECTRICAL CHARACTERISTICS PARAMETER Input High Voltage Input Low Voltage Notes: 1. This condition is for AC function test only, not for AC parameter test maintain a valid level, the transitioning edge of the input must : a) Sustain a constant slew rate from the current AC level through the target AC level, V ...
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... K7R163684B K7R161884B AC TIMING CHARACTERISTICS PARAMETER SYMBOL Clock Clock Cycle Time ( Clock Phase Jitter ( Clock High Time ( Clock Low Time ( Clock to Clock (K↑ → K↑, C↑ → C↑) Clock to data clock (K↑ → C↑, K↑→ C↑) ...
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... K7R163684B K7R161884B PIN CAPACITANCE PRMETER Address Control Input Capacitance Input and Output Capacitance Clock Capacitance Note: 1. Parameters are tested with RQ=250Ω and V 2. Periodically sampled and not 100% tested. THERMAL RESISTANCE PRMETER Junction to Ambient Junction to Case Note: Junction temperature is a function of on-chip power dissipation, package thermal impedance, mounting site temperature and mounting site x θ ...
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... K7R163684B K7R161884B TIMING WAVE FORMS OF READ AND NOP READ t KHKH t KLKH KHKH KHKL IVKH KHIX R Q (Data Out) t KHKH t KLKH KHKL Note: 1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0. ...
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... K7R163684B K7R161884B TIMING WAVE FORMS OF READ, WRITE AND NOP READ D(Data In) D(Data Out Note address A3=A2, data Q3-1=D2-1, data Q3-2=D2-2 , data Q3-3=D2-3, data Q3-4=D2-4 Write data is forwarded immediately as read results. 2.BWx ( NWx ) assumed active. 512Kx36 & 1Mx18 QDR WRITE READ A2 A3 ...
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... K7R163684B K7R161884B IEEE 1149.1 TEST ACCESS PORT AND BOUNDARY SCAN-JTAG This part contains an IEEE standard 1149.1 Compatible Test Access Port(TAP). The package pads are monitored by the Serial Scan circuitry when in test mode. This is to support connectivity testing during manufacturing and system diagnostics. Internal data is not driven out of the SRAM under JTAG control ...
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... K7R163684B K7R161884B SCAN REGISTER DEFINITION Part Instruction Register 512Kx36 3 bits 1Mx18 3 bits ID REGISTER DEFINITION Revision Number Part (31:29) 512Kx36 000 1Mx18 000 Note : Part Configuration /def=001 for 18Mb, /wx=11 for x36, 10 for x18 /t=1 for DLL Ver., 0 for non-DLL Ver. /q=1 for QDR, 0 for DDR /b=1 for 4Bit Burst, 0 for 2Bit Burst /s=1 for Separate I/O, 0 for Common I/O ...
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... K7R163684B K7R161884B JTAG DC OPERATING CONDITIONS Parameter Power Supply Voltage Input High Level Input Low Level Output High Voltage(I =-2mA) OH Output Low Voltage(I =2mA) OL Note: 1. The input level of SRAM pin is to follow the SRAM DC specification JTAG AC TEST CONDITIONS Parameter Input High/Low Level ...
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... K7R163684B K7R161884B 165 FBGA PACKAGE DIMENSIONS 13mm x 15mm Body, 1.0mm Bump Pitch, 11x15 Ball Array Symbol Value Units A 13 ± 0.1 15 ± 0.1 B 1.3 ± 0 0.35 ± 0.05 512Kx36 & 1Mx18 QDR Note Symbol SRAM B Top View ...