K7R641882M Samsung semiconductor, K7R641882M Datasheet - Page 18

• Manufacturer Part Number: K7R641882M
• Description: 2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM
• Manufacturer: Samsung semiconductor

JTAG AC TEST CONDITIONS
Note: 1. See SRAM AC test output load on page 12.
JTAG DC OPERATING CONDITIONS
Note: 1. The input level of SRAM pin is to follow the SRAM DC specification
JTAG AC Characteristics
JTAG TIMING DIAGRAM
K7R643682M
K7R641882M
K7R640982M
Input High/Low Level
Input Rise/Fall Time
Input and Output Timing Reference Level
Power Supply Voltage
Input High Level
Input Low Level
Output High Voltage(I
Output Low Voltage(I
TCK Cycle Time
TCK High Pulse Width
TCK Low Pulse Width
TMS Input Setup Time
TMS Input Hold Time
TDI Input Setup Time
TDI Input Hold Time
SRAM Input Setup Time
SRAM Input Hold Time
Clock Low to Output Valid
(SRAM)
TMS
TDO
PI
TCK
TDI
Parameter
Parameter
Parameter
OL
OH
=2mA)
=-2mA)
t
CHCH
t
CLQV
Symbol
2Mx36 & 4Mx18 & 8Mx9 QDR
Symbol
V
TR/TF
V
V
V
V
V
IH
DD
OH
OL
IH
IL
/V
t
t
t
Symbol
DVCH
IL
MVCH
SVCH
t
t
t
t
t
t
t
t
t
t
CHCH
MVCH
CHMX
DVCH
CHDX
SVCH
CHSX
CHCL
CLCH
CLQV
- 18 -
.
Min
-0.3
V
1.7
1.3
1.4
SS
t
t
t
CHMX
CHDX
CHSX
Min
50
20
20
5
5
5
5
5
5
0
t
CHCL
1.3/0.5
1.0/1.0
Min
Typ
0.9
1.8
-
-
-
-
Max
10
-
-
-
-
-
-
-
-
-
V
DD
Max
V
1.9
0.5
0.4
DD
+0.3
t
CLCH
Unit
TM
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Unit
ns
V
V
V
V
V
V
V
Preliminary
II b2 SRAM
Note
Note
Note
Oct. 2004
1
Rev 0.5