EVAL-AD7934-6CB AD [Analog Devices], EVAL-AD7934-6CB Datasheet - Page 20

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EVAL-AD7934-6CB

Manufacturer Part Number
EVAL-AD7934-6CB
Description
4-Channel, 625 kSPS, 12-Bit Parallel ADC with a Sequencer
Manufacturer
AD [Analog Devices]
Datasheet
AD7934-6
The ADC then returns to Channel 0 and starts the sequence
again. The WR input must be kept high to ensure that the control
register is not accidentally overwritten and the sequence inter-
rupted. This pattern continues until the AD7934-6 is written to.
Figure 31 shows the flowchart of the consecutive sequence mode.
REFERENCE SECTION
The AD7934-6 can operate with either the on-chip reference or
external reference. The internal reference is selected by setting
the REF bit in the internal control register to 1. A block diagram
of the internal reference circuitry is shown in Figure 32. The
internal reference circuitry includes an on-chip 2.5 V band gap
reference and a reference buffer. When using the internal refer-
ence, the V
a 0.47 µF capacitor. This internal reference not only provides
the reference for the analog-to-digital conversion, but it can also
be used externally in the system. It is recommended that the
reference output is buffered using an external precision op amp
before applying it anywhere in the system.
Alternatively, an external reference can be applied to the
V
input is selected by setting the REF bit in the internal control
register to 0. The external reference input range is 0.1 V to V
It is important to ensure that when choosing the reference value,
the maximum analog input range (V
V
device. For example, if operating in differential mode and the
reference is sourced from V
be used. This is because the analog input signal range would now
extend to 2 × V
tions. In the pseudo differential modes, the user must ensure that
(V
V
REFIN
DD
REF
REF
+ 0.3 V, in order to comply with the maximum ratings of the
+ V
/V
+ V
REFOUT
IN−
IN−
V
Figure 32. Internal Reference Circuit Block Diagram
) ≤ V
Figure 31. Consecutive Sequence Mode Flow Chart
REFIN
) ≤ V
V
REFOUT
REFIN
pin of the AD7934-6. An external reference
SELECTED FINAL CHANNEL ON ADD1 AND ADD0
CONTINUOUSLY CONVERT ON A CONSECUTIVE
/V
DD
SEQUENCE OF CHANNELS FROM CHANNEL 0
DD
SET UP OPERATING MODE, ANALOG INPUT,
/
DD
UP TO AND INCLUDING THE PREVIOUSLY
, which would exceed maximum rating condi-
WRITE TO THE CONTROL REGISTER TO
AND OUTPUT CONFIGURATION. SELECT
REFOUT
when using the 2 × V
FINAL CHANNEL (ADD1 AND ADD0) IN
when using the 0 to V
WITH EACH CONVST PULSE.
CONSECUTIVE SEQUENCE.
pin should be decoupled to AGND with
BUFFER
SET SEQ0 = SEQ1 = 1.
DD
POWER ON
, then the 0 to 2 × V
ADC
IN MAX
REFERENCE
AD7934-6
REF
REF
) is never greater than
range.
range, or that (2 ×
REF
range cannot
DD
Rev. A | Page 20 of 28
.
In all cases, the specified reference is 2.5 V.
The performance of the part with different reference values is
shown in Figure 9 , Figure 10, and Figure 11. The value of the
reference sets the analog input span and the common-mode
voltage range. Errors in the reference source result in gain
errors in the AD7934-6 transfer function and add to the
specified full-scale errors on the part.
Table 11 lists suitable voltage references available from Analog
Devices that can be used. Figure 33 shows a typical connection
diagram for an external reference.
Table 11. Examples of Suitable Voltage References
Reference
AD780
ADR421
ADR420
Digital Inputs
The digital inputs applied to the AD7934-6 are not limited by
the maximum ratings that limit the analog inputs. Instead, the
digital inputs applied can go to 7 V. They are not restricted by
the AV
Another advantage of the digital inputs not being restricted by
the AV
are avoided. If any of these inputs are applied before AV
there is no risk of latch-up as there is on the analog inputs if a
signal greater than 0.3 V is applied prior to AV
V
The AD7934-6 also has a V
voltage at which the parallel interface operates. V
ADC to easily interface to 3 V and 5 V processors. For example,
if the AD7934-6 is operated with an AV
pin is powered from a 3 V supply, the AD7934-6 has better
dynamic performance with an AV
to interface to 3 V processors. Care should be taken to ensure
V
Absolute Maximum Ratings section).
V
*ADDITIONAL PINS OMITTED FOR CLARITY
DD
DRIVE
0.1µF
DRIVE
Input
does not exceed AV
DD
DD
+ 0.3 V limit is that the power supply sequencing issues
10nF
+ 0.3 V limit that is on the analog inputs.
Output
Voltage
2.5/3
2.5
2.048
Figure 33. Typical V
0.1µF
NC
NC = NO CONNECT
1
2
3
4
DD
DRIVE
Initial Accuracy
(% max)
0.04
0.04
0.05
+V
TEMP
GND
O/PSELECT
by more than 0.3 V (see the
IN
REF
AD780
Connection Diagram
feature. V
TRIM
V
DD
OUT
of 5 V while still being able
8
7
6
5
DD
2.5V
DRIVE
of 5 V, and the V
NC
NC
NC
DD
controls the
Operating
Current (µA)
1000
500
500
.
DRIVE
AD7934-6*
allows the
DD
0.1µF
, then
V
DRIVE
REF

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