EVAL-ADV7533-SAZ AD [Analog Devices], EVAL-ADV7533-SAZ Datasheet - Page 6

• Manufacturer Part Number: EVAL-ADV7533-SAZ
• Description: MIPI/DSI Receiver
• Manufacturer: AD [Analog Devices]

ADV7533
The power supply noise sensitivity of the
specified in mV rms vs. frequency (see Figure 2).
MIPI/DSI SPECIFICATIONS
Unless noted, timing and levels comply with MIPI DPHY standards.
Table 2. DSI High Speed (HS) Specifications
Parameters
DC SPECIFICATIONS
AC SPECIFICATIONS
DSI Input Common Mode Voltage
DSI Input High Threshold
DSI Input Low Threshold
DSI Single-Ended Input High Voltage
DSI Single-Ended Input Low Voltage
DSI Single-Ended Threshold for Termination Enable
Differential Input Impedance
Single Channel Data Rate
Data to Clock Setup Time
Data to Clock Hold Time
DSI Clock Duty Cycle
Common-Mode Interference Beyond 450 MHz
Common-Mode Interference 50 MHz to 450 MHz
Common-Mode Termination
ADV7533
70
60
50
40
30
20
10
0
1
is frequency dependent. Therefore, the maximum noise limit for the PVDD is
Figure 2. PVDD Maximum Noise Limit
10
C
Symbol
V
V
V
V
V
V
Z
t
t
∆V
∆V
SETUP
HOLD
Rev. 0 | Page 6 of 12
CMRX
IDTH
IDTL
IHHS
ILHS
TERM-EN
ID
CM
CMRX(HF)
CMRX(LF)
FREQUENCY (Hz)
100
Temp
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
1k
Test Level
VII
VII
VII
VII
VII
VII
VII
IV
VII
VII
VII
VII
VII
VII
10k
Min
70
−70
−40
80
200
0.15
0.15
45
−50
ADV7533
Typ
100
50
Max
330
70
460
450
125
800
55
100
+50
60
Unit
mV
mV
mV
mV
mV
mV
Ω
Mbps
UI
UI
%
mV
mV
pF
INST
INST