74LVX573MX Fairchild Semiconductor, 74LVX573MX Datasheet
74LVX573MX
Specifications of 74LVX573MX
Related parts for 74LVX573MX
74LVX573MX Summary of contents
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... Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbols IEEE/IEC © 2005 Fairchild Semiconductor Corporation Features Input voltage translation from Ideal for low power/low noise 3.3V applications Guaranteed simultaneous switching noise level and ...
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Functional Description The LVX573 contains eight D-type latches. When the enable (LE) input is HIGH, data on the D n latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. Input Voltage ( Output Diode Current ( 0. 0.5V ...
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AC Electrical Characteristics V CC Symbol Parameter (V) t Propagation 2.7 PLH t Delay Time PHL 3.3 0 Propagation 2.7 PLH t Delay Time PHL 3.3 0 ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...