HCF4015M013TR STMicroelectronics, HCF4015M013TR Datasheet

IC INPUT/OUTP DUAL 4STAGE 16SOIC

HCF4015M013TR

Manufacturer Part Number
HCF4015M013TR
Description
IC INPUT/OUTP DUAL 4STAGE 16SOIC
Manufacturer
STMicroelectronics
Series
4000r
Datasheet

Specifications of HCF4015M013TR

Logic Type
Register, D-Type
Output Type
Standard
Number Of Elements
2
Number Of Bits Per Element
4
Function
Serial to Parallel
Voltage - Supply
3 V ~ 20 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1117-2

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Part Number:
HCF4015M013TR
Manufacturer:
ST
0
DESCRIPTION
HCF4015B is a monolithic integrated circuit
fabricated
technology available in DIP and SOP packages.
HCF4015B consists of two identical, independent,
4 stage serial-input/parallel-output registers.
Each register has independent CLOCK and
RESET inputs as well as a single serial DATA
input. "Q" outputs are available from each of the
PIN CONNECTION
September 2002
MEDIUM SPEED OPERATION 12 MHz (Typ.)
CLOCK RATE AT V
FULLY STATIC OPERATION
8 MASTER-SLAVE FLIP-FLOPS PLUS
INPUT AND OUTPUT BUFFERING
HIGH NOISE IMMUNITY
QUIESCENT CURRENT SPECIFIED UP TO
20V
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
I
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
I
= 100nA (MAX) AT V
in
Metal
DUAL 4-STAGE STATIC SHIFT REGISTER WITH
DD
Oxide
DD
- V
SS
= 18V T
= 10V
Semiconductor
A
= 25°C
SERIAL INPUT/PARALLEL OUTPUT
ORDER CODES
four stages on both registers. All register stages
are D-TYPE, MASTER-SLAVE flip-flops. The
logic level present at the DATA input is transferred
into the first register stage and shifted over one
stage at each positive going clock transition. The
resetting of all stages is accomplished by a high
level on the reset line. It is possible to expand the
register to 8 stages using one HCF4015B
package and to expand to more than 8 stages by
using addition HCF4015Bs.
PACKAGE
SOP
DIP
DIP
HCF4015BEY
HCF4015BM1
TUBE
HCF4015B
HCF4015M013TR
SOP
T & R
1/10

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HCF4015M013TR Summary of contents

Page 1

... The resetting of all stages is accomplished by a high level on the reset line possible to expand the register to 8 stages using one HCF4015B package and to expand to more than 8 stages by using addition HCF4015Bs. HCF4015B DIP SOP TUBE T & R HCF4015BEY HCF4015BM1 HCF4015M013TR 1/10 ...

Page 2

HCF4015B INPUT EQUIVALENT CIRCUIT FUNCTIONAL DIAGRAM TRUTH TABLE CLOCK Don’t Care 2/10 PIN DESCRIPTION PIN 13, 12, 11 ...

Page 3

LOGIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Input Current I P Power Dissipation per Package D Power Dissipation per Output Transistor T Operating Temperature op T Storage Temperature stg Absolute ...

Page 4

HCF4015B DC SPECIFICATIONS Symbol Parameter V (V) I Quiescent Current 0/5 L 0/10 0/15 0/20 V High Level Output 0/5 OH Voltage 0/10 0/15 V Low Level Output 5/0 OL Voltage 10/0 15/0 V High Level Input IH Voltage V ...

Page 5

DYNAMIC ELECTRICAL CHARACTERISTICS (T Symbol Parameter CLOCKED OPERATION t t Propagation Delay Time PLH PHL (carry out or decoded out lines Transition Time (carry out THL TLH or decoded out lines) Maximum Clock Input f CL Frequency t ...

Page 6

HCF4015B TEST CIRCUIT C = 50pF or equivalent (includes jig and probe capacitance 200K pulse generator (typically OUT WAVEFORM 1 : MINIMUM PULSE WIDTH, PROPAGATION DELAY TIME (f=1MHz; 50% ...

Page 7

WAVEFORM 2 : MINIMUM SETUP TIME (f=1MHz; 50% duty cycle) HCF4015B 7/10 ...

Page 8

HCF4015B Plastic DIP-16 (0.25) MECHANICAL DATA DIM. MIN. a1 0. 8/10 mm. TYP MAX. MIN. 0.020 1.65 0.030 0.5 0.25 20 8.5 2.54 17.78 7.1 5.1 3.3 1.27 ...

Page 9

SO-16 MECHANICAL DATA mm. DIM. MIN. TYP 0.35 b1 0. 9.8 E 5.8 e 1.27 e3 8.89 F 3.8 G 4 inch MAX. MIN. TYP. 1.75 0.2 ...

Page 10

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...

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