LC75811W Sanyo Semicon Device, LC75811W Datasheet - Page 12

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LC75811W

Manufacturer Part Number
LC75811W
Description
1/8 to 1/10 Duty Dot Matrix LCD Display Controller/Driver
Manufacturer
Sanyo Semicon Device
Datasheet
SC: Controls the common and segment output pins.
Note: *12. When SC is 1, the S1 to S60 and COM1 to COM10 output pins are set to the VSS level, regardless of the M, A, and DG1 to DG12 data.
BU: Controls the normal mode and power saving mode.
• Display shift ... <Shifts the display>
M, A: Specifies the data to be shifted
• Set AC address... <Specifies the DCRAM and ADRAM address for AC>
DA0 to DA5: DCRAM address
Least significant bit
RA0 to RA3: ADRAM address
Least significant bit
This instruction loads the 6-bit DCRAM address DA0 to DA5 and the 4-bit ADRAM address RA0 to RA3 into the AC.
DA0 DA1 DA2 DA3 DA4 DA5
D56 D57 D58 D59 D60 D61 D62 D63
D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
M
M
0
0
1
1
LSB
LSB
DA0
RA0
SC
BU
0
1
0
1
A
A
0
1
0
1
Output of LCD drive waveforms
Fixed at the V
Normal mode
Power saving mode
(In this mode, the OSCI and OSCO pins oscillator is stopped, and the common and segment pins are set to the V
instructions other than the “display on/off control” instruction cannot be executed. Thus applications must set the LSI to normal mode before
executing any of the other instructions.)
R/L
DA1
RA1
Neither MDATA nor ADATA is shifted
Only ADATA is shifted
Only MDATA is shifted
Both MDATA and ADATA are shifted
X
Common and segment output pin states
Code
DA2
RA2
SS
0
level (all segments off)
Most significant bit
Shift operating state
0
DA3
RA3
MSB
X: don’t care
1
X
DA4
X
1
Code
Most significant bit
RA0 RA1 RA2 RA3
MSB
DA5
LC75811E, 75811W
0
R/L: Shift direction specification
Mode
R/L
0
1
1
X: don’t care
0
Shift direction
0
Right shift
Left shift
SS
level. In this mode,
No. 5915-12/27

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