IA2910A-CD40M INNOVASIC [InnovASIC, Inc], IA2910A-CD40M Datasheet
IA2910A-CD40M
Related parts for IA2910A-CD40M
IA2910A-CD40M Summary of contents
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... Sequence Control Microinstructions Output Enable controls 3 Branch Address Sources The IA2910A uses innovASIC’ s innovative new f other vendors have declared obsolete. By specifying parts through this program a customer is assured of never having a component become obsolete again. This data sheet assumes the original part has been designed in, and so provides a summary of capabilities only ...
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... The IA2910A is an address controller which will sequence through a series of microinstructions contained in a ROM or PROM. There are four sources of addresses from which the IA2910A may select. The first is a direct data bus (DIN) input, which is straightforward. The second is an internal address register. This register contains data loaded during a previous microinstruction ...
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... The direct input furnishes a source of data for loading the register/counter. The IA2910A contains a microprogram counter that is composed of a 12-bit incrementer followed by a 12-bit register. The counter can be used in either of two ways. When the carry-in to the incrementer is HIGH, the microprogram register is loaded on the next clock cycle with the current YOUT output word plus one ...
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... IA2910A Microprogram Controller pointer remains at zero whenever a POP is attempted from a stack already empty. The register/counter is operated during three microinstructions (8, 9, and 15 12-bit down counter, with result = zero available as a microinstruction branch test criterion. This provides efficient iteration of microinstructions. The register/counter is arranged such that preloaded with a number N and then used as a loop termination counter, the sequence will be executed exactly times ...
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... Active low. Condition code. Used as test criterion, pass is low on CCn. CCENn I Active low. Condition code enable. When set high, CCn is ignored and the IA2910A operates as it CCn were a low. RLDn I Active low. Clock enable to address register, allows loading of register/counter regardless of instruction or condition. ...
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... HIGH and CCENn LOW is used as a test the 16 instructions. RLDn, when LOW, causes the DIN input to be loaded into the register/counter, overriding any HOLD or DEC operation specified in the instruction. OEn, normally LOW, may be forced HIGH to remove the IA2910A YOUT outputs from a three-state bus. ...
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... Not equal IA2910A Instruction Set The IA2910A provides sixteen instructions which select the address of the next microinstruction to be executed. Four of the instructions are unconditional – their effect depends only on the instruction. Ten of the instructions have an effect which is partially controlled by an external, data- dependent condition ...
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... IA2910A Microprogram Controller forced unconditionally; or (3) tying it to the source of IA2910A instruction bit I(0), which leaves instructions 4, 6, and 10 as data-dependent but makes others unconditional. All of these tricks save one bit of microcode width. The effect of three instructions depends on the contents of the register/counter. Unless the counter holds a value of zero decremented ...
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... Let’ s assume that the branch address fields of instruction 53 contain the value 90 so that it will be in the IA2910A register/counter when the contents of address 54 are in the pipeline register. This requires that the instruction at address 53 load the register/counter. ...
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... IA2910A Microprogram Controller Instruction 8 RFCT is the REPEAT LOOP, COUNTER NOT EQUAL ZERO instruction. This microinstruction makes use of the decrementing capability of the register/counter useful, some previous instruction, such as 4, must have loaded a count value into the register/counter. This instruction checks to see whether the register/counter contains a non-zero value ...
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... IA2910A Microprogram Controller transfer to the next instruction at address 53. If the test is failed, the next microinstruction at address 94 will be executed. The program will continue to address 97 where the subroutine is complete. To perform an unconditional RETURN-FROM-SUBROUTINE, the CRTN instruction is executed unconditionally; the microinstruction at address 97 is programmed to force CCENn HIGH, disabling the test and the forced PASS causes an unconditional return ...
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... IA2910A Microprogram Controller Instruction 15 TWB, THREE-WAY-BRANCH, is the most complex. It provides for testing for both a data-dependent condition and the counter during one microinstruction and provides for selecting among one of three microinstruction addresses as the next microinstruction to be performed. Like instruction 8, a previous instruction will have loaded a count into the register/counter while pushing a microbranch address onto the stack ...
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... IA2910A Microprogram Controller Absolute Maximum Ratings PARAMETER Supply voltage Input voltage Input Pin Current I IN Operating temperature range Storage temperature range Ambient Temperature Lead Temperature Power Dissipation Stresses beyond those listed under “ absolute maximum ratings” may cause permanent damage to the device. Operating the device beyond the conditions indicated in the “ ...
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... IA2910A Microprogram Controller Parametric Voltage and Current Levels (Ambient Temperature = - Input Pin TBD Output Pin TBD Pullup Pin IPU Min TBD AC Specifications Parameter Min TBD Max Max Copyright 1999, InnovASIC Inc. Customer Specific IC Solutions ...
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... IA2910A Microprogram Controller IA2910A Execution Examples Figure 2 0 JUMP ZERO PUSH/COND LD CNTR STACK REGISTER/ 53 COUNTER REPEAT LOOP, CNTR .NE COND JUMP R/ COND RETURN 11 COND JUMP PL & POP ...
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... IA2910A Microprogram Controller PLCC Packaging Dimensions (Theta J = TBD) PIN 1 IDENTIFIER & ZONE TOP VIEW .030 ± .005 e .013/.021 SIDE VIEW Preliminary SEATING PLANE .03R .020 MIN ± 2 Deg. Copyright 1999, InnovASIC Inc. Customer Specific IC Solutions Page Data Sheet ...
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... IA2910A Microprogram Controller PDIP Packaging Dimensions (Theta J = TBD) TOP LEAD 1 IDENTIFIER 1 LEAD COUNT DIRECTION SIDE VIEW (LENGTH Copyright 1999, InnovASIC Inc. Customer Specific IC Solutions Page Preliminary Data Sheet eA eB SIDE VIEW (WIDTH) Lead Count 28 (in Inches) ...
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... Special Processing Space Q = MIL-STD-883 Temperature Commercial I = Industrial M = Military Number of Leads Package Type: Per Package Designator Table IC Base Number innovASIC Designator Copyright 1999, InnovASIC Inc. Customer Specific IC Solutions Page Preliminary Data Sheet Order Number IA2910A-CD40M IA2910A-PDW40I IA2910A-PDW40C IA2910A-CLC44M IA2910A-CLL44M IA2910A-PLC44I IA2910A-PLC44C ...
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... IA2910A Microprogram Controller Package Designator Table Package Type Ceramic side brazed Dual In-line Cerdip with window Ceramic leaded chip carrier Cerdip without window Ceramic leadless chip carrier PLCC Plastic DIP standard (300 mil) Plastic DIP standard (600 mil) Plastic metric quad flat pack ...