AK4646EN AKM [Asahi Kasei Microsystems], AK4646EN Datasheet - Page 67

• Manufacturer Part Number: AK4646EN
• Description: Stereo CODEC with MIC/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

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When ADC or DAC is powered-up, the clocks must be supplied.
MS0557-E-02
Power Supply
PMVCM bit
(Addr:00H, D6)
(Addr:01H, D1)
(Addr:01H, D0)
(Addr:01H, D3)
PMPLL bit
LRCK pin
MCKO pin
Clock Set up
1. PLL Master Mode.
<Example>
MCKO bit
BICK pin
MCKI pin
PDN pin
M/S bit
(1) After Power Up, PDN pin = “L”
(2) DIF1-0, PLL3-0, FS3-0, BCKO and M/S bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0”
(4) In case of using MCKO output: MCKO bit = “1”
(5) PLL lock time is 40ms (max) after PMPLL bit changes from “0” to “1” and MCKI is supplied from an external
(6) The AK4646 starts to output the LRCK and BICK clocks after the PLL becomes stable. Then normal operation
(7) The invalid frequency is output from MCKO pin during this period if MCKO bit = “1”.
(8) The normal clock is output from MCKO pin after the PLL is locked if MCKO bit = “1”.
“L” time of 150ns or more is needed to reset the AK4646.
VCOM should first be powered-up before the other block operates.
In case of not using MCKO output: MCKO bit = “0”
source.
starts.
(1)
(2)
(3)
(4)
(5)
Figure 38. Clock Set Up Sequence (1)
40msec(max)
(7)
40msec(max)
CONTROL SEQUENCE
“H”
Input
“1”
(6)
(8)
- 67 -
Output
Output
Example:
(1) Power Supply & PDN pin = “L”
Input Master Clock Select at PLL Mode: 11.2896MHz
BICK frequency at Master Mode: 64fs
Audio I/F Format: MSB justified (ADC & DAC)
MCKO: Enable
Sampling Frequency: 44.1kHz
MCKO, BICK and LRCK output
(2)Addr:01H, Data:08H
(4)Addr:01H, Data:0BH
(3)Addr:00H, Data:40H
Addr:04H, Data:4AH
Addr:05H, Data:27H
[AK4646]
“H”
2007/05